Enumeration fields

Register fields can be of the type enumeration. Meaning, a field that can only take on a limited, pre-defined, and named, set of values. This is a very common and highly useful programming concept. See Wikipedia if you are unfamiliar with this: https://en.wikipedia.org/wiki/Enumerated_type

This page will show you how the set up enumeration fields in a register, and will showcase all the code that can be generated from it.

Usage in TOML

The TOML file below shows how to set up a register with two enumeration fields. See comments for rules about the different properties.

TOML that sets up a register with enumeration fields.

[register.config]

mode = "r_w"
description = "Configuration register."

# This will allocate an enumeration field named "severity_level" in the "config" register.
[register.config.enumeration.severity_level]

# The "description" property is optional for an enumeration field.
# Will default to "" if not specified.
# The value specified must be a string.
description = "Run-time configuration of severity."
# The "default_value" property is optional for an enumeration field.
# The value specified must be a string that matches one of the enumeration element names
# specified below.
# Will default to the first enumeration element declared below, if not specified.
default_value = "warning"

# For an enumeration field there must be at least one enumeration element declared.
# The name of each element is mapped below to the description of that element.
element.info = "Informational message. Is not considered an error."
element.warning = "Warning message. Is not considered an error."
element.error = "Error message. Is considered an error."
element.failure = "Failure message. Is considered an error."


[register.config.enumeration.packet_source]

description = "Set input mux."

element.streaming = "Process incoming streaming data."
element.dma = "Read packets from DMA."
element.none = "Don't send anything."

Note that the second field does not have any default value, meaning that it will automatically default to the first element (streaming).

Below you will see how you can parse this TOML file and generate artifacts from it.

Usage with Python API

The Python code below shows

1. How to parse the TOML file listed above.

2. How to create an identical register list when instead using the Python API.

3. How to generate register artifacts.

Note that the result of the create_from_api call is identical to that of the parse_toml call. Meaning that using a TOML file or using the Python API is completely equivalent. You choose yourself which method you want to use in your code base.

Python code that sets up a register with enumeration fields.

# Standard libraries
import sys
from pathlib import Path

# First party libraries
from hdl_registers.generator.c.header import CHeaderGenerator
from hdl_registers.generator.cpp.implementation import CppImplementationGenerator
from hdl_registers.generator.cpp.interface import CppInterfaceGenerator
from hdl_registers.generator.html.page import HtmlPageGenerator
from hdl_registers.generator.vhdl.record_package import VhdlRecordPackageGenerator
from hdl_registers.generator.vhdl.register_package import VhdlRegisterPackageGenerator
from hdl_registers.parser.toml import from_toml
from hdl_registers.register_list import RegisterList

THIS_DIR = Path(__file__).parent


def parse_toml() -> RegisterList:
    """
    Create the register list by parsing a TOML data file.
    """
    return from_toml(name="caesar", toml_file=THIS_DIR.parent / "toml" / "field_enumeration.toml")


def create_from_api() -> RegisterList:
    """
    Alternative method: Create the register list by using the Python API.
    """
    register_list = RegisterList(name="caesar")

    register = register_list.append_register(
        name="config", mode="r_w", description="Configuration register."
    )

    register.append_enumeration(
        name="severity_level",
        description="Run-time configuration of severity.",
        elements={
            "info": "Informational message. Is not considered an error.",
            "warning": "Warning message. Is not considered an error.",
            "error": "Error message. Is considered an error.",
            "failure": "Failure message. Is considered an error.",
        },
        default_value="warning",
    )

    register.append_enumeration(
        name="packet_source",
        description="Set input mux.",
        elements={
            "streaming": "Process incoming streaming data.",
            "dma": "Read packets from DMA.",
            "none": "Don't send anything.",
        },
        default_value="streaming",
    )

    return register_list


def generate(register_list: RegisterList, output_folder: Path):
    """
    Generate the artifacts that we are interested in.
    """
    CHeaderGenerator(register_list=register_list, output_folder=output_folder).create()

    CppImplementationGenerator(register_list=register_list, output_folder=output_folder).create()
    CppInterfaceGenerator(register_list=register_list, output_folder=output_folder).create()

    HtmlPageGenerator(register_list=register_list, output_folder=output_folder).create()

    VhdlRegisterPackageGenerator(register_list=register_list, output_folder=output_folder).create()
    VhdlRecordPackageGenerator(register_list=register_list, output_folder=output_folder).create()


def main(output_folder: Path):
    generate(register_list=parse_toml(), output_folder=output_folder / "toml")
    generate(register_list=create_from_api(), output_folder=output_folder / "api")


if __name__ == "__main__":
    main(output_folder=Path(sys.argv[1]))

See Register.append_enumeration() for more Python API details.

Generated code

See below for a description of the code that can be generated when using enumeration fields.

HTML page

See HTML file below for the human-readable documentation that is produced by the generate() call in the Python example above. Each enumeration field is documented and the description of each element is included.

See HTML code generator for more details about the HTML generator and its capabilities.

HTML page

VHDL package

The VHDL code below is produced by the generate() call in the Python example above. Click the button to expand and view the code. See VHDL code generator for instructions on how it can be used in your VHDL project.

Base register package

Some interesting things to notice:

1. There is only one register, at index 0.

2. The first field is two bits wide, occupying bits 1 and 0, while the second one is only one bit wide, occupying but 3.

3. VHDL supports enumeration types natively. The elements of the enumeration are exposed to the scope of the package, and all files that include it.

4. For each enumeration field, there are conversion functions for

   1. Converting from the enumeration type to std_logic_vector.

   2. Slicing a register value at the correct range and converting from std_logic_vector to enumeration.

Click to expand/collapse code.

Generated VHDL register package.

-- This file is automatically generated by hdl-registers version 4.1.1-dev2.
-- Code generator VhdlRegisterPackageGenerator version 1.0.0.
-- Generated 2023-12-04 10:43 at commit d6ece437d0e3b2bc.
-- Register hash 0374f5fdddb8924a10afac061b0395e46dc08973.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.fixed_pkg.all;

library reg_file;
use reg_file.reg_file_pkg.all;


package caesar_regs_pkg is

  -- ---------------------------------------------------------------------------
  -- The valid range of register indexes.
  subtype caesar_reg_range is natural range 0 to 0;

  -- Register indexes, within the list of registers.
  constant caesar_config : natural := 0;

  -- Declare 'reg_map' and 'regs_init' constants here but define them in body (deferred constants).
  -- So that functions have been elaborated when they are called.
  -- Needed for ModelSim compilation to pass.

  -- To be used as the 'regs' generic of 'axi_lite_reg_file.vhd'.
  constant caesar_reg_map : reg_definition_vec_t(caesar_reg_range);

  -- To be used for the 'regs_up' and 'regs_down' ports of 'axi_lite_reg_file.vhd'.
  subtype caesar_regs_t is reg_vec_t(caesar_reg_range);
  -- To be used as the 'default_values' generic of 'axi_lite_reg_file.vhd'.
  constant caesar_regs_init : caesar_regs_t;

  -- To be used for the 'reg_was_read' and 'reg_was_written' ports of 'axi_lite_reg_file.vhd'.
  subtype caesar_reg_was_accessed_t is std_ulogic_vector(caesar_reg_range);

  -- -----------------------------------------------------------------------------
  -- Fields in the 'config' register.
  -- Range of the 'severity_level' field.
  subtype caesar_config_severity_level is natural range 1 downto 0;
  -- Width of the 'severity_level' field.
  constant caesar_config_severity_level_width : positive := 2;
  -- Type for the 'severity_level' field.
  type caesar_config_severity_level_t is (
    severity_level_info,
    severity_level_warning,
    severity_level_error,
    severity_level_failure
  );
  -- Default value of the 'severity_level' field.
  constant caesar_config_severity_level_init : caesar_config_severity_level_t := severity_level_warning;
  -- Type for the 'severity_level' field as an SLV.
  subtype caesar_config_severity_level_slv_t is std_ulogic_vector(1 downto 0);
  -- Cast a 'severity_level' field value to SLV.
  function to_slv(data : caesar_config_severity_level_t) return caesar_config_severity_level_slv_t;
  -- Get a 'severity_level' field value from a register value.
  function to_caesar_config_severity_level(data : reg_t) return caesar_config_severity_level_t;

  -- Range of the 'packet_source' field.
  subtype caesar_config_packet_source is natural range 3 downto 2;
  -- Width of the 'packet_source' field.
  constant caesar_config_packet_source_width : positive := 2;
  -- Type for the 'packet_source' field.
  type caesar_config_packet_source_t is (
    packet_source_streaming,
    packet_source_dma,
    packet_source_none
  );
  -- Default value of the 'packet_source' field.
  constant caesar_config_packet_source_init : caesar_config_packet_source_t := packet_source_streaming;
  -- Type for the 'packet_source' field as an SLV.
  subtype caesar_config_packet_source_slv_t is std_ulogic_vector(1 downto 0);
  -- Cast a 'packet_source' field value to SLV.
  function to_slv(data : caesar_config_packet_source_t) return caesar_config_packet_source_slv_t;
  -- Get a 'packet_source' field value from a register value.
  function to_caesar_config_packet_source(data : reg_t) return caesar_config_packet_source_t;

end package;

package body caesar_regs_pkg is

  constant caesar_reg_map : reg_definition_vec_t(caesar_reg_range) := (
    0 => (idx => caesar_config, reg_type => r_w)
  );

  constant caesar_regs_init : caesar_regs_t := (
    0 => "00000000000000000000000000000001"
  );

  function to_slv(data : caesar_config_severity_level_t) return caesar_config_severity_level_slv_t is
    constant data_int : natural := caesar_config_severity_level_t'pos(data);
    constant result : caesar_config_severity_level_slv_t := std_ulogic_vector(
      to_unsigned(data_int, caesar_config_severity_level_width)
    );
  begin
    return result;
  end function;

  function to_caesar_config_severity_level(data : reg_t) return caesar_config_severity_level_t is
    constant field_slv : caesar_config_severity_level_slv_t := data(caesar_config_severity_level);
    constant field_int : natural := to_integer(unsigned(field_slv));
    constant result : caesar_config_severity_level_t := caesar_config_severity_level_t'val(field_int);
  begin
    return result;
  end function;

  function to_slv(data : caesar_config_packet_source_t) return caesar_config_packet_source_slv_t is
    constant data_int : natural := caesar_config_packet_source_t'pos(data);
    constant result : caesar_config_packet_source_slv_t := std_ulogic_vector(
      to_unsigned(data_int, caesar_config_packet_source_width)
    );
  begin
    return result;
  end function;

  function to_caesar_config_packet_source(data : reg_t) return caesar_config_packet_source_t is
    constant field_slv : caesar_config_packet_source_slv_t := data(caesar_config_packet_source);
    constant field_int : natural := to_integer(unsigned(field_slv));
    constant result : caesar_config_packet_source_t := caesar_config_packet_source_t'val(field_int);
  begin
    return result;
  end function;

end package body;

Record package

The caesar_regs_down_t type is a record with a member config, the only register in this example. The type of the config member is another record with the two enumerations set up in our example: severity_level and packet_source. These are of enumeration types defined in the base register package above.

In our VHDL code we can access a field value for example like this:

if regs_down.config.packet_source = packet_source_streaming then
  result_valid <= input_valid;
elsif regs_down.config.packet_source = packet_source_dma then
  result_valid <= job_valid;
else
  -- packet_source_none
  result_valid <= '0';
end if;

Click to expand/collapse code.

Generated VHDL record package.

-- This file is automatically generated by hdl-registers version 4.1.1-dev2.
-- Code generator VhdlRecordPackageGenerator version 1.0.0.
-- Generated 2023-12-04 10:43 at commit d6ece437d0e3b2bc.
-- Register hash 0374f5fdddb8924a10afac061b0395e46dc08973.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.fixed_pkg.all;

library reg_file;
use reg_file.reg_file_pkg.all;

use work.caesar_regs_pkg.all;


package caesar_register_record_pkg is

  -- -----------------------------------------------------------------------------
  -- Record with correctly-typed members for each field in each register.
  -- Fields in the 'config' register as a record.
  type caesar_config_t is record
    severity_level : caesar_config_severity_level_t;
    packet_source : caesar_config_packet_source_t;
  end record;
  -- Default value for the 'config' register as a record.
  constant caesar_config_init : caesar_config_t := (
    severity_level => caesar_config_severity_level_init,
    packet_source => caesar_config_packet_source_init
  );
  -- Convert a record of the 'config' register to SLV.
  function to_slv(data : caesar_config_t) return reg_t;
  -- Convert an SLV register value to the record for the 'config' register.
  function to_caesar_config(data : reg_t) return caesar_config_t;

  -- -----------------------------------------------------------------------------
  -- Below is a record with correctly typed and ranged members for all registers, register arrays
  -- and fields that are in the 'down' direction.
  -- Record with everything in the 'down' direction.
  type caesar_regs_down_t is record
    config : caesar_config_t;
  end record;
  -- Default value of the above record.
  constant caesar_regs_down_init : caesar_regs_down_t := (
    config => caesar_config_init
  );
  -- Convert SLV register list to record with everything in the 'down' direction.
  function to_caesar_regs_down(data : caesar_regs_t) return caesar_regs_down_t;

  -- ---------------------------------------------------------------------------
  -- Below is a record with a status bit for each readable register in the register map.
  -- It can be used for the 'reg_was_read' port of a register file wrapper.
  -- Combined status mask record for all readable register.
  type caesar_reg_was_read_t is record
    config : std_ulogic;
  end record;
  -- Default value for the above record.
  constant caesar_reg_was_read_init : caesar_reg_was_read_t := (
    others => '0'
  );
  -- Convert an SLV 'reg_was_read' from generic register file to the record above.
  function to_caesar_reg_was_read(
    data : caesar_reg_was_accessed_t
  ) return caesar_reg_was_read_t;

  -- ---------------------------------------------------------------------------
  -- Below is a record with a status bit for each writeable register in the register map.
  -- It can be used for the 'reg_was_written' port of a register file wrapper.
  -- Combined status mask record for all writeable register.
  type caesar_reg_was_written_t is record
    config : std_ulogic;
  end record;
  -- Default value for the above record.
  constant caesar_reg_was_written_init : caesar_reg_was_written_t := (
    others => '0'
  );
  -- Convert an SLV 'reg_was_written' from generic register file to the record above.
  function to_caesar_reg_was_written(
    data : caesar_reg_was_accessed_t
  ) return caesar_reg_was_written_t;

end package;

package body caesar_register_record_pkg is

  function to_slv(data : caesar_config_t) return reg_t is
    variable result : reg_t := (others => '-');
  begin
    result(caesar_config_severity_level) := to_slv(data.severity_level);
    result(caesar_config_packet_source) := to_slv(data.packet_source);

    return result;
  end function;

  function to_caesar_config(data : reg_t) return caesar_config_t is
    variable result : caesar_config_t := caesar_config_init;
  begin
    result.severity_level := to_caesar_config_severity_level(data);
    result.packet_source := to_caesar_config_packet_source(data);

    return result;
  end function;

  function to_caesar_regs_down(data : caesar_regs_t) return caesar_regs_down_t is
    variable result : caesar_regs_down_t := caesar_regs_down_init;
  begin
    result.config := to_caesar_config(data(caesar_config));

    return result;
  end function;

  function to_caesar_reg_was_read(
    data : caesar_reg_was_accessed_t
  ) return caesar_reg_was_read_t is
    variable result : caesar_reg_was_read_t := caesar_reg_was_read_init;
  begin
    result.config := data(caesar_config);

    return result;
  end function;

  function to_caesar_reg_was_written(
    data : caesar_reg_was_accessed_t
  ) return caesar_reg_was_written_t is
    variable result : caesar_reg_was_written_t := caesar_reg_was_written_init;
  begin
    result.config := data(caesar_config);

    return result;
  end function;

end package body;

C++ interface header

The C++ interface header code below is produced by the generate() call in the Python example above. Click the button to expand and view the code.

The class header and implementation are skipped here, since their inclusion would make this page very long. See C++ code generator for more details and an example of how the excluded files might look.

Some interesting things to notice in the interface header:

1. The valid enumeration values are defined using a C++ enum declaration in the namespace of each field.

2. The setters and getters for each field value use the enumeration type as argument or return value.

Click to expand/collapse code.

Generated C++ interface class code.

// This file is automatically generated by hdl-registers version 4.1.1-dev2.
// Code generator CppInterfaceGenerator version 1.0.0.
// Generated 2023-12-04 10:43 at commit d6ece437d0e3b2bc.
// Register hash 0374f5fdddb8924a10afac061b0395e46dc08973.

#pragma once

#include <cassert>
#include <cstdint>
#include <cstdlib>

namespace fpga_regs
{

  // Attributes for the "severity_level" field in the "config" register.
  namespace caesar::config::severity_level
  {
    static const auto width = 2;
    enum Enumeration
    {
      info = 0,
      warning = 1,
      error = 2,
      failure = 3,
    };
    static const auto default_value = Enumeration::warning;
  }
  // Attributes for the "packet_source" field in the "config" register.
  namespace caesar::config::packet_source
  {
    static const auto width = 2;
    enum Enumeration
    {
      streaming = 0,
      dma = 1,
      none = 2,
    };
    static const auto default_value = Enumeration::streaming;
  }

  class ICaesar
  {
  public:
    // Number of registers within this register map.
    static const size_t num_registers = 1uL;

    virtual ~ICaesar() {}

    // -------------------------------------------------------------------------
    // Methods for the 'config' register. Mode "Read, Write".

    // Getter that will read the whole register's value over the register bus.
    virtual uint32_t get_config() const = 0;

    // Setter that will write the whole register's value over the register bus.
    virtual void set_config(
      uint32_t register_value
    ) const = 0;

    // Getter for the "severity_level" field in the "config" register,
    // which will read register value over the register bus.
    virtual caesar::config::severity_level::Enumeration get_config_severity_level() const = 0;
    // Getter for the "severity_level" field in the "config" register,
    // given the register's current value.
    virtual caesar::config::severity_level::Enumeration get_config_severity_level_from_value(
      uint32_t register_value
    ) const = 0;
    // Setter for the "severity_level" field in the "config" register,
    // which will read-modify-write over the register bus.
    virtual void set_config_severity_level(
      caesar::config::severity_level::Enumeration field_value
    ) const = 0;
    // Setter for the "severity_level" field in the "config" register,
    // given the register's current value, which will return an updated value.
    virtual uint32_t set_config_severity_level_from_value(
      uint32_t register_value,
      caesar::config::severity_level::Enumeration field_value
    ) const = 0;

    // Getter for the "packet_source" field in the "config" register,
    // which will read register value over the register bus.
    virtual caesar::config::packet_source::Enumeration get_config_packet_source() const = 0;
    // Getter for the "packet_source" field in the "config" register,
    // given the register's current value.
    virtual caesar::config::packet_source::Enumeration get_config_packet_source_from_value(
      uint32_t register_value
    ) const = 0;
    // Setter for the "packet_source" field in the "config" register,
    // which will read-modify-write over the register bus.
    virtual void set_config_packet_source(
      caesar::config::packet_source::Enumeration field_value
    ) const = 0;
    // Setter for the "packet_source" field in the "config" register,
    // given the register's current value, which will return an updated value.
    virtual uint32_t set_config_packet_source_from_value(
      uint32_t register_value,
      caesar::config::packet_source::Enumeration field_value
    ) const = 0;

  };

} /* namespace fpga_regs */

C header

The C code below is produced by the generate() call in the Python example above. The range and mask of the each field are available as constants. Note how the valid enumeration values are defined using a C enum declaration.

Click to expand/collapse code.

Generated C code.

// This file is automatically generated by hdl-registers version 4.1.1-dev2.
// Code generator CHeaderGenerator version 1.0.0.
// Generated 2023-12-04 10:43 at commit d6ece437d0e3b2bc.
// Register hash 0374f5fdddb8924a10afac061b0395e46dc08973.

#ifndef CAESAR_REGS_H
#define CAESAR_REGS_H


// Number of registers within this register map.
#define CAESAR_NUM_REGS (1u)

// Type for this register map.
typedef struct caesar_regs_t
{
  // Mode "Read, Write".
  uint32_t config;
} caesar_regs_t;

// Address of the "config" register.
// Mode "Read, Write".
#define CAESAR_CONFIG_INDEX (0u)
#define CAESAR_CONFIG_ADDR (4u * CAESAR_CONFIG_INDEX)
// Attributes for the "severity_level" field in the "config" register.
#define CAESAR_CONFIG_SEVERITY_LEVEL_SHIFT (0u)
#define CAESAR_CONFIG_SEVERITY_LEVEL_MASK (0b11u << 0u)
#define CAESAR_CONFIG_SEVERITY_LEVEL_MASK_INVERSE (~CAESAR_CONFIG_SEVERITY_LEVEL_MASK)
enum CaesarConfigSeverityLevel
{
  CAESAR_CONFIG_SEVERITY_LEVEL_INFO = 0,
  CAESAR_CONFIG_SEVERITY_LEVEL_WARNING = 1,
  CAESAR_CONFIG_SEVERITY_LEVEL_ERROR = 2,
  CAESAR_CONFIG_SEVERITY_LEVEL_FAILURE = 3,
};
// Attributes for the "packet_source" field in the "config" register.
#define CAESAR_CONFIG_PACKET_SOURCE_SHIFT (2u)
#define CAESAR_CONFIG_PACKET_SOURCE_MASK (0b11u << 2u)
#define CAESAR_CONFIG_PACKET_SOURCE_MASK_INVERSE (~CAESAR_CONFIG_PACKET_SOURCE_MASK)
enum CaesarConfigPacketSource
{
  CAESAR_CONFIG_PACKET_SOURCE_STREAMING = 0,
  CAESAR_CONFIG_PACKET_SOURCE_DMA = 1,
  CAESAR_CONFIG_PACKET_SOURCE_NONE = 2,
};

#endif // CAESAR_REGS_H