Integer constants

Register constants can be of type integer. This page will show you how the set up integer constants, as well as showcase all the code that can be generated from it.

Usage in TOML

The TOML file below shows how to set up a register list with two integer constants. Note that in the TOML, the type of the constant is determined by the type of the literal value.

TOML that sets up a register list with integer constants.
 1# This will allocate a register constant with the name "axi_data_width" of data type integer.
 2[axi_data_width]
 3
 4# The "type" property MUST be present and set to "constant".
 5type = "constant"
 6
 7# The "value" property MUST be present for an integer constant.
 8# The value specified MUST be an integer.
 9value = 64
10
11# The "description" property is OPTIONAL for a constant.
12# Will default to "" if not specified.
13# The value specified MUST be a string.
14description = "Data width of the AXI port used by this module."
15
16
17[burst_length_beats]
18
19type = "constant"
20value = 256

Note that the second constant does not have a description specified, meaning it will default to an empty string.

Below you will see how you can parse this TOML file and generate artifacts from it.

Usage with Python API

The Python code below shows

  1. How to parse the TOML file listed above.

  2. How to create an identical register list when instead using the Python API.

  3. How to generate register artifacts.

Note that the result of the create_from_api call is identical to that of the parse_toml call. Meaning that using a TOML file or using the Python API is completely equivalent. You choose yourself which method you want to use in your code base.

Python code that sets up a register list with integer constants.
 1# Standard libraries
 2import sys
 3from pathlib import Path
 4
 5# First party libraries
 6from hdl_registers.generator.c.header import CHeaderGenerator
 7from hdl_registers.generator.cpp.interface import CppInterfaceGenerator
 8from hdl_registers.generator.html.page import HtmlPageGenerator
 9from hdl_registers.generator.vhdl.register_package import VhdlRegisterPackageGenerator
10from hdl_registers.parser.toml import from_toml
11from hdl_registers.register_list import RegisterList
12
13THIS_DIR = Path(__file__).parent
14
15
16def parse_toml() -> RegisterList:
17    """
18    Create the register list by parsing a TOML data file.
19    """
20    return from_toml(name="caesar", toml_file=THIS_DIR.parent / "toml" / "constant_integer.toml")
21
22
23def create_from_api() -> RegisterList:
24    """
25    Alternative method: Create the register list by using the Python API.
26    """
27    register_list = RegisterList(name="caesar")
28
29    register_list.add_constant(
30        name="axi_data_width",
31        value=64,
32        description="Data width of the AXI port used by this module.",
33    )
34
35    register_list.add_constant(
36        name="burst_length_beats",
37        value=256,
38        description="",
39    )
40
41    return register_list
42
43
44def generate(register_list: RegisterList, output_folder: Path):
45    """
46    Generate the artifacts that we are interested in.
47    """
48    CHeaderGenerator(register_list=register_list, output_folder=output_folder).create()
49    CppInterfaceGenerator(register_list=register_list, output_folder=output_folder).create()
50    HtmlPageGenerator(register_list=register_list, output_folder=output_folder).create()
51    VhdlRegisterPackageGenerator(register_list=register_list, output_folder=output_folder).create()
52
53
54def main(output_folder: Path):
55    generate(register_list=parse_toml(), output_folder=output_folder / "toml")
56    generate(register_list=create_from_api(), output_folder=output_folder / "api")
57
58
59if __name__ == "__main__":
60    main(output_folder=Path(sys.argv[1]))

See RegisterList.add_constant() for more Python API details.

Generated code

See below for a description of the code that can be generated with these constants.

Note that the examples on this page set up a register list with only constants, no registers. This allowed of course, but albeit a little bit rare.

HTML page

See HTML file below for the human-readable documentation that is produced by the generate() call in the Python example above.

HTML page

VHDL package

The VHDL code below is produced by the generate() call in the Python example above. Click the button to expand and view the code.

Click to expand/collapse code.
Generated VHDL code.
 1-- This file is automatically generated by hdl-registers version 6.2.1-dev.
 2-- Code generator VhdlRegisterPackageGenerator version 1.0.0.
 3-- Generated 2024-12-19 20:52 at commit cd01ff93f646632c.
 4-- Register hash 4fc928c3ecfeb4682c3468952959c4763ee5636e.
 5
 6library ieee;
 7use ieee.std_logic_1164.all;
 8use ieee.numeric_std.all;
 9use ieee.fixed_pkg.all;
10
11library reg_file;
12use reg_file.reg_file_pkg.all;
13
14
15package caesar_regs_pkg is
16
17  -- ---------------------------------------------------------------------------
18  -- Values of register constants.
19  constant caesar_constant_axi_data_width : integer := 64;
20  constant caesar_constant_burst_length_beats : integer := 256;
21
22end package;

C++ interface

The C++ interface header code below is produced by the generate() call in the Python example above. Click the button to expand and view the code.

Click to expand/collapse code.
Generated C++ interface class code.
 1// This file is automatically generated by hdl-registers version 6.2.1-dev.
 2// Code generator CppInterfaceGenerator version 1.0.0.
 3// Generated 2024-12-19 20:52 at commit cd01ff93f646632c.
 4// Register hash 4fc928c3ecfeb4682c3468952959c4763ee5636e.
 5
 6#pragma once
 7
 8#include <sstream>
 9#include <cstdint>
10#include <cstdlib>
11
12namespace fpga_regs
13{
14
15  class ICaesar
16  {
17  public:
18    // Register constant.
19    static const int axi_data_width = 64;
20    // Register constant.
21    static const int burst_length_beats = 256;
22
23    // Number of registers within this register map.
24    static const size_t num_registers = 0uL;
25
26    virtual ~ICaesar() {}
27
28  };
29
30} /* namespace fpga_regs */

C header

The C code below is produced by the generate() call in the Python example above.

Click to expand/collapse code.
Generated C code.
 1// This file is automatically generated by hdl-registers version 6.2.1-dev.
 2// Code generator CHeaderGenerator version 1.0.0.
 3// Generated 2024-12-19 20:52 at commit cd01ff93f646632c.
 4// Register hash 4fc928c3ecfeb4682c3468952959c4763ee5636e.
 5
 6#ifndef CAESAR_REGS_H
 7#define CAESAR_REGS_H
 8
 9// Value of register constant 'axi_data_width'.
10#define CAESAR_AXI_DATA_WIDTH (64)
11// Value of register constant 'burst_length_beats'.
12#define CAESAR_BURST_LENGTH_BEATS (256)
13
14// Number of registers within this register map.
15#define CAESAR_NUM_REGS (0u)
16
17// Type for this register map.
18typedef struct caesar_regs_t
19{
20} caesar_regs_t;
21
22#endif // CAESAR_REGS_H