Bit vector fields

Register fields can be of the type bit vector. Meaning, an array of logic bits.

This page will show you how the set up bit vector fields in a register, and will showcase all the code that can be generated from it.

Usage in TOML

The TOML file below shows how to set up a register with two bit vector fields. See comments for rules about the different properties.

TOML that sets up a register with bit vector fields.
 1[config]
 2
 3mode = "r_w"
 4description = "Configuration register."
 5
 6# This will allocate a bit vector field named "tuser" in the "config" register.
 7[config.tuser]
 8
 9# The "type" property MUST be present and set to "bit_vector".
10type = "bit_vector"
11
12# The "width" property MUST be present for a bit vector field.
13# The value specified MUST be a positive integer.
14width = 4
15
16# The "description" property is OPTIONAL for a bit vector field.
17# Will default to "" if not specified.
18# The value specified MUST be a string.
19description = "Value to set for **TUSER** in the data stream."
20
21# The "default_value" property is OPTIONAL for a bit vector field.
22# Will default to all zeros if not specified.
23# The value specified MUST be a string whose length is the same as the
24# specified 'width' property value.
25# The value specified MUST contain only ones and zeros.
26default_value = "0101"
27
28
29[config.tid]
30
31type = "bit_vector"
32width = 8
33description = "Value to set for **TID** in the data stream."

Note that the second field does not have any default value specified, meaning it will default to all zeros.

Below you will see how you can parse this TOML file and generate artifacts from it.

Usage with Python API

The Python code below shows

  1. How to parse the TOML file listed above.

  2. How to create an identical register list when instead using the Python API.

  3. How to generate register artifacts.

Note that the result of the create_from_api call is identical to that of the parse_toml call. Meaning that using a TOML file or using the Python API is completely equivalent. You choose yourself which method you want to use in your code base.

Python code that sets up a register with bit vector fields.
 1# Standard libraries
 2import sys
 3from pathlib import Path
 4
 5# First party libraries
 6from hdl_registers.generator.c.header import CHeaderGenerator
 7from hdl_registers.generator.cpp.implementation import CppImplementationGenerator
 8from hdl_registers.generator.cpp.interface import CppInterfaceGenerator
 9from hdl_registers.generator.html.page import HtmlPageGenerator
10from hdl_registers.generator.vhdl.record_package import VhdlRecordPackageGenerator
11from hdl_registers.generator.vhdl.register_package import VhdlRegisterPackageGenerator
12from hdl_registers.parser.toml import from_toml
13from hdl_registers.register_list import RegisterList
14from hdl_registers.register_modes import REGISTER_MODES
15
16THIS_DIR = Path(__file__).parent
17
18
19def parse_toml() -> RegisterList:
20    """
21    Create the register list by parsing a TOML data file.
22    """
23    return from_toml(name="caesar", toml_file=THIS_DIR.parent / "toml" / "field_bit_vector.toml")
24
25
26def create_from_api() -> RegisterList:
27    """
28    Alternative method: Create the register list by using the Python API.
29    """
30    register_list = RegisterList(name="caesar")
31
32    register = register_list.append_register(
33        name="config", mode=REGISTER_MODES["r_w"], description="Configuration register."
34    )
35
36    register.append_bit_vector(
37        name="tuser",
38        description="Value to set for **TUSER** in the data stream.",
39        width=4,
40        default_value="0101",
41    )
42
43    register.append_bit_vector(
44        name="tid",
45        description="Value to set for **TID** in the data stream.",
46        width=8,
47        default_value="00000000",
48    )
49
50    return register_list
51
52
53def generate(register_list: RegisterList, output_folder: Path):
54    """
55    Generate the artifacts that we are interested in.
56    """
57    CHeaderGenerator(register_list=register_list, output_folder=output_folder).create()
58
59    CppImplementationGenerator(register_list=register_list, output_folder=output_folder).create()
60    CppInterfaceGenerator(register_list=register_list, output_folder=output_folder).create()
61
62    HtmlPageGenerator(register_list=register_list, output_folder=output_folder).create()
63
64    VhdlRegisterPackageGenerator(register_list=register_list, output_folder=output_folder).create()
65    VhdlRecordPackageGenerator(register_list=register_list, output_folder=output_folder).create()
66
67
68def main(output_folder: Path):
69    generate(register_list=parse_toml(), output_folder=output_folder / "toml")
70    generate(register_list=create_from_api(), output_folder=output_folder / "api")
71
72
73if __name__ == "__main__":
74    main(output_folder=Path(sys.argv[1]))

See Register.append_bit_vector() for more Python API details.

Generated code

See below for a description of the code that can be generated when using bit vector fields.

HTML page

See HTML file below for the human-readable documentation that is produced by the generate() call in the Python example above. Each bit vector field is documented with its range, default value and description.

See HTML code generator for more details about the HTML generator and its capabilities.

HTML page

VHDL package

The VHDL code below is produced by the generate() call in the Python example above. Click the button to expand and view the code. See VHDL code generator for instructions on how it can be used in your VHDL project.

Base register package

Some interesting things to notice:

  1. There is only one register, at index 0.

  2. The first field is four bits wide, occupying bits 3 down to 0, while the second one is eight bits wide, occupying but 11 down to 4.

  3. For each bit vector field there is a named integer subtype that defines the fields’s bit range within the register.

  4. In VHDL, slicing out a range from the register value will yield a value of type std_ulogic_vector, meaning that typically no casting is needed. Hence there are no conversion functions for bit vector fields, the way there are for e.g. enumeration fields.

Click to expand/collapse code.
Generated VHDL register package.
 1-- -----------------------------------------------------------------------------
 2-- This file is automatically generated by hdl-registers version 7.0.2-dev.
 3-- Code generator VhdlRegisterPackageGenerator version 2.0.0.
 4-- Generated 2025-01-21 20:52 at commit 3c3e6c67d817.
 5-- Register hash 81d8209b61d8521a21cdb30a8c428ed6a2d9db3d.
 6-- -----------------------------------------------------------------------------
 7
 8library ieee;
 9use ieee.std_logic_1164.all;
10use ieee.numeric_std.all;
11use ieee.fixed_pkg.all;
12
13library register_file;
14use register_file.register_file_pkg.all;
15
16
17package caesar_regs_pkg is
18
19  -- ---------------------------------------------------------------------------
20  -- The valid range of register indexes.
21  subtype caesar_register_range is natural range 0 to 0;
22
23  -- ---------------------------------------------------------------------------
24  -- The number of bits needed to address all 1 registers on a register bus.
25  -- Note that this figure includes the lowest two address bits that are assumed zero, since
26  -- registers are 32-bit and unaligned accesses are not supported.
27  constant caesar_address_width : positive := 3;
28
29  -- Register indexes, within the list of registers.
30  constant caesar_config : natural := 0;
31
32  -- Declare 'register_map' and 'regs_init' constants here but define them in
33  -- the package body (deferred constants).
34  -- So that functions have been elaborated when they are called.
35  -- Needed for ModelSim compilation to pass.
36
37  -- To be used as the 'registers' generic of 'axi_lite_register_file.vhd'.
38  constant caesar_register_map : register_definition_vec_t(caesar_register_range);
39
40  -- To be used for the 'regs_up' and 'regs_down' ports of 'axi_lite_register_file.vhd'.
41  subtype caesar_regs_t is register_vec_t(caesar_register_range);
42  -- To be used as the 'default_values' generic of 'axi_lite_register_file.vhd'.
43  constant caesar_regs_init : caesar_regs_t;
44
45  -- To be used for the 'reg_was_read' and 'reg_was_written' ports of 'axi_lite_register_file.vhd'.
46  subtype caesar_reg_was_accessed_t is std_ulogic_vector(caesar_register_range);
47
48  -- -----------------------------------------------------------------------------
49  -- Fields in the 'config' register.
50  -- Range of the 'tuser' field.
51  subtype caesar_config_tuser is natural range 3 downto 0;
52  -- Width of the 'tuser' field.
53  constant caesar_config_tuser_width : positive := 4;
54  -- Type for the 'tuser' field.
55  subtype caesar_config_tuser_t is u_unsigned(3 downto 0);
56  -- Default value of the 'tuser' field.
57  constant caesar_config_tuser_init : caesar_config_tuser_t := "0101";
58
59  -- Range of the 'tid' field.
60  subtype caesar_config_tid is natural range 11 downto 4;
61  -- Width of the 'tid' field.
62  constant caesar_config_tid_width : positive := 8;
63  -- Type for the 'tid' field.
64  subtype caesar_config_tid_t is u_unsigned(7 downto 0);
65  -- Default value of the 'tid' field.
66  constant caesar_config_tid_init : caesar_config_tid_t := "00000000";
67
68end package;
69
70package body caesar_regs_pkg is
71
72  constant caesar_register_map : register_definition_vec_t(caesar_register_range) := (
73    0 => (index => caesar_config, mode => r_w, utilized_width => 12)
74  );
75
76  constant caesar_regs_init : caesar_regs_t := (
77    0 => "00000000000000000000000000000101"
78  );
79
80end package body;

Record package

The caesar_regs_down_t type is a record with a member config, the only register in this example. The type of the config member is another record with the two bit vectors set up in our example: tuser and tid. These are of unsigned vector types defined in the base register package above.

In our VHDL code we can access a field value for example like this:

result_tuser <= regs_down.config.tuser;
Click to expand/collapse code.
Generated VHDL record package.
  1-- -----------------------------------------------------------------------------
  2-- This file is automatically generated by hdl-registers version 7.0.2-dev.
  3-- Code generator VhdlRecordPackageGenerator version 1.0.0.
  4-- Generated 2025-01-21 20:52 at commit 3c3e6c67d817.
  5-- Register hash 81d8209b61d8521a21cdb30a8c428ed6a2d9db3d.
  6-- -----------------------------------------------------------------------------
  7
  8library ieee;
  9use ieee.fixed_pkg.all;
 10use ieee.std_logic_1164.all;
 11use ieee.numeric_std.all;
 12
 13library register_file;
 14use register_file.register_file_pkg.register_t;
 15
 16use work.caesar_regs_pkg.all;
 17
 18
 19package caesar_register_record_pkg is
 20
 21  -- -----------------------------------------------------------------------------
 22  -- Record with correctly-typed members for each field in each register.
 23  -- Fields in the 'config' register as a record.
 24  type caesar_config_t is record
 25    tuser : caesar_config_tuser_t;
 26    tid : caesar_config_tid_t;
 27  end record;
 28  -- Default value for the 'config' register as a record.
 29  constant caesar_config_init : caesar_config_t := (
 30    tuser => caesar_config_tuser_init,
 31    tid => caesar_config_tid_init
 32  );
 33  -- Convert a record of the 'config' register to SLV.
 34  function to_slv(data : caesar_config_t) return register_t;
 35  -- Convert an SLV register value to the record for the 'config' register.
 36  function to_caesar_config(data : register_t) return caesar_config_t;
 37
 38  -- -----------------------------------------------------------------------------
 39  -- Below is a record with correctly typed and ranged members for all registers, register arrays
 40  -- and fields that are in the 'down' direction.
 41  -- Record with everything in the 'down' direction.
 42  type caesar_regs_down_t is record
 43    config : caesar_config_t;
 44  end record;
 45  -- Default value of the above record.
 46  constant caesar_regs_down_init : caesar_regs_down_t := (
 47    config => caesar_config_init
 48  );
 49  -- Convert SLV register list to record with everything in the 'down' direction.
 50  function to_caesar_regs_down(data : caesar_regs_t) return caesar_regs_down_t;
 51
 52  -- ---------------------------------------------------------------------------
 53  -- Below is a record with a status bit for each readable register in the register list.
 54  -- It can be used for the 'reg_was_read' port of a register file wrapper.
 55  -- Combined status mask record for all readable register.
 56  type caesar_reg_was_read_t is record
 57    config : std_ulogic;
 58  end record;
 59  -- Default value for the above record.
 60  constant caesar_reg_was_read_init : caesar_reg_was_read_t := (
 61    others => '0'
 62  );
 63  -- Convert an SLV 'reg_was_read' from generic register file to the record above.
 64  function to_caesar_reg_was_read(
 65    data : caesar_reg_was_accessed_t
 66  ) return caesar_reg_was_read_t;
 67
 68  -- ---------------------------------------------------------------------------
 69  -- Below is a record with a status bit for each writeable register in the register list.
 70  -- It can be used for the 'reg_was_written' port of a register file wrapper.
 71  -- Combined status mask record for all writeable register.
 72  type caesar_reg_was_written_t is record
 73    config : std_ulogic;
 74  end record;
 75  -- Default value for the above record.
 76  constant caesar_reg_was_written_init : caesar_reg_was_written_t := (
 77    others => '0'
 78  );
 79  -- Convert an SLV 'reg_was_written' from generic register file to the record above.
 80  function to_caesar_reg_was_written(
 81    data : caesar_reg_was_accessed_t
 82  ) return caesar_reg_was_written_t;
 83
 84end package;
 85
 86package body caesar_register_record_pkg is
 87
 88  function to_slv(data : caesar_config_t) return register_t is
 89    variable result : register_t := (others => '-');
 90  begin
 91    result(caesar_config_tuser) := std_ulogic_vector(data.tuser);
 92    result(caesar_config_tid) := std_ulogic_vector(data.tid);
 93
 94    return result;
 95  end function;
 96
 97  function to_caesar_config(data : register_t) return caesar_config_t is
 98    variable result : caesar_config_t := caesar_config_init;
 99  begin
100    result.tuser := caesar_config_tuser_t(data(caesar_config_tuser));
101    result.tid := caesar_config_tid_t(data(caesar_config_tid));
102
103    return result;
104  end function;
105
106  function to_caesar_regs_down(data : caesar_regs_t) return caesar_regs_down_t is
107    variable result : caesar_regs_down_t := caesar_regs_down_init;
108  begin
109    result.config := to_caesar_config(data(caesar_config));
110
111    return result;
112  end function;
113
114  function to_caesar_reg_was_read(
115    data : caesar_reg_was_accessed_t
116  ) return caesar_reg_was_read_t is
117    variable result : caesar_reg_was_read_t := caesar_reg_was_read_init;
118  begin
119    result.config := data(caesar_config);
120
121    return result;
122  end function;
123
124  function to_caesar_reg_was_written(
125    data : caesar_reg_was_accessed_t
126  ) return caesar_reg_was_written_t is
127    variable result : caesar_reg_was_written_t := caesar_reg_was_written_init;
128  begin
129    result.config := data(caesar_config);
130
131    return result;
132  end function;
133
134end package body;

C++

The C++ interface header and implementation code below is produced by the generate() call in the Python example above. Click the button to expand and view each code block.

The class header is skipped here, since its inclusion would make this page very long. See C++ code generator for more details and an example of how the excluded file might look.

C++ interface header

Note the setters and getters for each individual field value.

Click to expand/collapse code.
Generated C++ class interface code.
 1// -----------------------------------------------------------------------------
 2// This file is automatically generated by hdl-registers version 7.0.2-dev.
 3// Code generator CppInterfaceGenerator version 1.0.0.
 4// Generated 2025-01-21 20:52 at commit 3c3e6c67d817.
 5// Register hash 81d8209b61d8521a21cdb30a8c428ed6a2d9db3d.
 6// -----------------------------------------------------------------------------
 7
 8#pragma once
 9
10#include <sstream>
11#include <cstdint>
12#include <cstdlib>
13
14namespace fpga_regs
15{
16
17  // Attributes for the 'tuser' field in the 'config' register.
18  namespace caesar::config::tuser
19  {
20    static const auto width = 4;
21    static const auto default_value = 0b0101;
22  }
23  // Attributes for the 'tid' field in the 'config' register.
24  namespace caesar::config::tid
25  {
26    static const auto width = 8;
27    static const auto default_value = 0b00000000;
28  }
29
30  class ICaesar
31  {
32  public:
33    // Number of registers within this register list.
34    static const size_t num_registers = 1uL;
35
36    virtual ~ICaesar() {}
37
38    // -------------------------------------------------------------------------
39    // Methods for the 'config' register. Mode 'Read, Write'.
40
41    // Getter that will read the whole register's value over the register bus.
42    virtual uint32_t get_config() const = 0;
43
44    // Setter that will write the whole register's value over the register bus.
45    virtual void set_config(
46      uint32_t register_value
47    ) const = 0;
48
49    // Getter for the 'tuser' field in the 'config' register,
50    // which will read register value over the register bus.
51    virtual uint32_t get_config_tuser() const = 0;
52    // Getter for the 'tuser' field in the 'config' register,
53    // given a register value.
54    virtual uint32_t get_config_tuser_from_value(
55      uint32_t register_value
56    ) const = 0;
57    // Setter for the 'tuser' field in the 'config' register,
58    // which will read-modify-write over the register bus.
59    virtual void set_config_tuser(
60      uint32_t field_value
61    ) const = 0;
62    // Setter for the 'tuser' field in the 'config' register,
63    // given a register value, which will return an updated value.
64    virtual uint32_t set_config_tuser_from_value(
65      uint32_t register_value,
66      uint32_t field_value
67    ) const = 0;
68
69    // Getter for the 'tid' field in the 'config' register,
70    // which will read register value over the register bus.
71    virtual uint32_t get_config_tid() const = 0;
72    // Getter for the 'tid' field in the 'config' register,
73    // given a register value.
74    virtual uint32_t get_config_tid_from_value(
75      uint32_t register_value
76    ) const = 0;
77    // Setter for the 'tid' field in the 'config' register,
78    // which will read-modify-write over the register bus.
79    virtual void set_config_tid(
80      uint32_t field_value
81    ) const = 0;
82    // Setter for the 'tid' field in the 'config' register,
83    // given a register value, which will return an updated value.
84    virtual uint32_t set_config_tid_from_value(
85      uint32_t register_value,
86      uint32_t field_value
87    ) const = 0;
88
89  };
90
91} /* namespace fpga_regs */

C++ implementation

Note that each setter performs assertions that the supplied argument is withing the legal range of the field. This will catch calculation errors during testing and at run-time.

Click to expand/collapse code.
Generated C++ class implementation code.
  1// -----------------------------------------------------------------------------
  2// This file is automatically generated by hdl-registers version 7.0.2-dev.
  3// Code generator CppImplementationGenerator version 2.0.0.
  4// Generated 2025-01-21 20:52 at commit 3c3e6c67d817.
  5// Register hash 81d8209b61d8521a21cdb30a8c428ed6a2d9db3d.
  6// -----------------------------------------------------------------------------
  7
  8#include "include/caesar.h"
  9
 10namespace fpga_regs
 11{
 12
 13#ifdef NO_REGISTER_SETTER_ASSERT
 14
 15#define _SETTER_ASSERT_TRUE(expression, message) ((void)0)
 16
 17#else // Not NO_REGISTER_SETTER_ASSERT.
 18
 19// This macro is called by the register code to check for runtime errors.
 20#define _SETTER_ASSERT_TRUE(expression, message)                                 \
 21  {                                                                              \
 22    if (!static_cast<bool>(expression)) {                                        \
 23      std::ostringstream diagnostics;                                            \
 24      diagnostics << "Tried to set value out of range in " << __FILE__ << ":"    \
 25                  << __LINE__ << ", message: " << message << ".";                \
 26      std::string diagnostic_message = diagnostics.str();                        \
 27      _assert_failed(&diagnostic_message);                                       \
 28    }                                                                            \
 29  }
 30
 31#endif // NO_REGISTER_SETTER_ASSERT.
 32
 33#ifdef NO_REGISTER_GETTER_ASSERT
 34
 35#define _GETTER_ASSERT_TRUE(expression, message) ((void)0)
 36
 37#else // Not NO_REGISTER_GETTER_ASSERT.
 38
 39// This macro is called by the register code to check for runtime errors.
 40#define _GETTER_ASSERT_TRUE(expression, message)                                 \
 41  {                                                                              \
 42    if (!static_cast<bool>(expression)) {                                        \
 43      std::ostringstream diagnostics;                                            \
 44      diagnostics << "Got read value out of range in " << __FILE__ << ":"        \
 45                  << __LINE__ << ", message: " << message << ".";                \
 46      std::string diagnostic_message = diagnostics.str();                        \
 47      _assert_failed(&diagnostic_message);                                       \
 48    }                                                                            \
 49  }
 50
 51#endif // NO_REGISTER_GETTER_ASSERT.
 52
 53#ifdef NO_REGISTER_ARRAY_INDEX_ASSERT
 54
 55#define _ARRAY_INDEX_ASSERT_TRUE(expression, message) ((void)0)
 56
 57#else // Not NO_REGISTER_ARRAY_INDEX_ASSERT.
 58
 59// This macro is called by the register code to check for runtime errors.
 60#define _ARRAY_INDEX_ASSERT_TRUE(expression, message)                            \
 61  {                                                                              \
 62    if (!static_cast<bool>(expression)) {                                        \
 63      std::ostringstream diagnostics;                                            \
 64      diagnostics << "Provided array index out of range in " << __FILE__ << ":"  \
 65                  << __LINE__ << ", message: " << message << ".";                \
 66      std::string diagnostic_message = diagnostics.str();                        \
 67      _assert_failed(&diagnostic_message);                                       \
 68    }                                                                            \
 69  }
 70
 71#endif // NO_REGISTER_ARRAY_INDEX_ASSERT.
 72
 73  Caesar::Caesar(uintptr_t base_address, bool (*assertion_handler) (const std::string*))
 74      : m_registers(reinterpret_cast<volatile uint32_t *>(base_address)),
 75        m_assertion_handler(assertion_handler)
 76  {
 77    // Empty
 78  }
 79
 80  void Caesar::_assert_failed(const std::string *message) const
 81  {
 82    m_assertion_handler(message);
 83  }
 84
 85  // ---------------------------------------------------------------------------
 86  // Methods for the 'config' register.
 87  // See interface header for documentation.
 88
 89  uint32_t Caesar::get_config() const
 90  {
 91    const size_t index = 0;
 92    const uint32_t result = m_registers[index];
 93
 94    return result;
 95  }
 96
 97  uint32_t Caesar::get_config_tuser() const
 98  {
 99    const uint32_t register_value = get_config();
100    const uint32_t field_value = get_config_tuser_from_value(register_value);
101
102    return field_value;
103  }
104
105  uint32_t Caesar::get_config_tuser_from_value(
106    uint32_t register_value
107  ) const
108  {
109    const uint32_t shift = 0uL;
110    const uint32_t mask_at_base = 0b1111uL;
111    const uint32_t mask_shifted = mask_at_base << shift;
112
113    const uint32_t result_masked = register_value & mask_shifted;
114    const uint32_t result_shifted = result_masked >> shift;
115
116    uint32_t field_value;
117
118    // No casting needed.
119    field_value = result_shifted;
120
121    return field_value;
122  }
123
124  uint32_t Caesar::get_config_tid() const
125  {
126    const uint32_t register_value = get_config();
127    const uint32_t field_value = get_config_tid_from_value(register_value);
128
129    return field_value;
130  }
131
132  uint32_t Caesar::get_config_tid_from_value(
133    uint32_t register_value
134  ) const
135  {
136    const uint32_t shift = 4uL;
137    const uint32_t mask_at_base = 0b11111111uL;
138    const uint32_t mask_shifted = mask_at_base << shift;
139
140    const uint32_t result_masked = register_value & mask_shifted;
141    const uint32_t result_shifted = result_masked >> shift;
142
143    uint32_t field_value;
144
145    // No casting needed.
146    field_value = result_shifted;
147
148    return field_value;
149  }
150
151  void Caesar::set_config(
152    uint32_t register_value
153  ) const
154  {
155    const size_t index = 0;
156    m_registers[index] = register_value;
157  }
158
159  void Caesar::set_config_tuser(
160    uint32_t field_value
161  ) const
162  {
163    // Get the current value of other fields by reading register on the bus.
164    const uint32_t current_register_value = get_config();
165    const uint32_t result_register_value = set_config_tuser_from_value(current_register_value, field_value);
166    set_config(result_register_value);
167  }
168
169  uint32_t Caesar::set_config_tuser_from_value(
170    uint32_t register_value,
171    uint32_t field_value
172  ) const  {
173    const uint32_t shift = 0uL;
174    const uint32_t mask_at_base = 0b1111uL;
175    const uint32_t mask_shifted = mask_at_base << shift;
176
177    // Check that field value is within the legal range.
178    const uint32_t mask_at_base_inverse = ~mask_at_base;
179    _SETTER_ASSERT_TRUE(
180      (field_value & mask_at_base_inverse) == 0,
181      "'tuser' value too many bits used, got '" << field_value << "'"
182    );
183
184    const uint32_t field_value_masked = field_value & mask_at_base;
185    const uint32_t field_value_masked_and_shifted = field_value_masked << shift;
186
187    const uint32_t mask_shifted_inverse = ~mask_shifted;
188    const uint32_t register_value_masked = register_value & mask_shifted_inverse;
189
190    const uint32_t result_register_value = register_value_masked | field_value_masked_and_shifted;
191
192    return result_register_value;
193  }
194
195  void Caesar::set_config_tid(
196    uint32_t field_value
197  ) const
198  {
199    // Get the current value of other fields by reading register on the bus.
200    const uint32_t current_register_value = get_config();
201    const uint32_t result_register_value = set_config_tid_from_value(current_register_value, field_value);
202    set_config(result_register_value);
203  }
204
205  uint32_t Caesar::set_config_tid_from_value(
206    uint32_t register_value,
207    uint32_t field_value
208  ) const  {
209    const uint32_t shift = 4uL;
210    const uint32_t mask_at_base = 0b11111111uL;
211    const uint32_t mask_shifted = mask_at_base << shift;
212
213    // Check that field value is within the legal range.
214    const uint32_t mask_at_base_inverse = ~mask_at_base;
215    _SETTER_ASSERT_TRUE(
216      (field_value & mask_at_base_inverse) == 0,
217      "'tid' value too many bits used, got '" << field_value << "'"
218    );
219
220    const uint32_t field_value_masked = field_value & mask_at_base;
221    const uint32_t field_value_masked_and_shifted = field_value_masked << shift;
222
223    const uint32_t mask_shifted_inverse = ~mask_shifted;
224    const uint32_t register_value_masked = register_value & mask_shifted_inverse;
225
226    const uint32_t result_register_value = register_value_masked | field_value_masked_and_shifted;
227
228    return result_register_value;
229  }
230
231} /* namespace fpga_regs */

C header

The C code below is produced by the generate() call in the Python example above. The range and mask of the each field are available as constants.

Click to expand/collapse code.
Generated C code.
 1// -----------------------------------------------------------------------------
 2// This file is automatically generated by hdl-registers version 7.0.2-dev.
 3// Code generator CHeaderGenerator version 1.0.0.
 4// Generated 2025-01-21 20:52 at commit 3c3e6c67d817.
 5// Register hash 81d8209b61d8521a21cdb30a8c428ed6a2d9db3d.
 6// -----------------------------------------------------------------------------
 7
 8#ifndef CAESAR_REGS_H
 9#define CAESAR_REGS_H
10
11
12// Number of registers within this register list.
13#define CAESAR_NUM_REGS (1u)
14
15// Type for this register list.
16typedef struct caesar_regs_t
17{
18  // Mode "Read, Write".
19  uint32_t config;
20} caesar_regs_t;
21
22// Address of the 'config' register.
23// Mode 'Read, Write'.
24#define CAESAR_CONFIG_INDEX (0u)
25#define CAESAR_CONFIG_ADDR (4u * CAESAR_CONFIG_INDEX)
26// Attributes for the 'tuser' field in the 'config' register.
27#define CAESAR_CONFIG_TUSER_SHIFT (0u)
28#define CAESAR_CONFIG_TUSER_MASK (0b1111u << 0u)
29#define CAESAR_CONFIG_TUSER_MASK_INVERSE (~CAESAR_CONFIG_TUSER_MASK)
30// Attributes for the 'tid' field in the 'config' register.
31#define CAESAR_CONFIG_TID_SHIFT (4u)
32#define CAESAR_CONFIG_TID_MASK (0b11111111u << 4u)
33#define CAESAR_CONFIG_TID_MASK_INVERSE (~CAESAR_CONFIG_TID_MASK)
34
35#endif // CAESAR_REGS_H