Documentation of caesar registers

This document is a specification for the register interface of the FPGA module caesar.

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Register modes

The following register modes are available.

Mode Description
Read Bus can read a value that fabric provides.
Write Bus can write a value that is available for fabric usage.
Read, Write Bus can write a value and read it back. The written value is available for fabric usage.
Write-pulse Bus can write a value that is asserted for one clock cycle in fabric.
Read, Write-pulse Bus can read a value that fabric provides. Bus can write a value that is asserted for one clock cycle in fabric.

Registers

The following registers make up the register map.

Name Index Address Mode Default value Description
config 0 0x0000 Read, Write 0x1 Configuration register.
  severity_level   1:0 warning Run-time configuration of severity.

Can be set to the following values:
info (0):
Informational message. Is not considered an error.
warning (1):
Warning message. Is not considered an error.
error (2):
Error message. Is considered an error.
failure (3):
Failure message. Is considered an error.
  packet_source   3:2 streaming Set input mux.

Can be set to the following values:
streaming (0):
Process incoming streaming data.
dma (1):
Read packets from DMA.
none (2):
Don't send anything.

Constants

This module does not have any constants.