Release notes

Release history and changelog for the hdl-registers project. We follow the semantic versioning scheme MAJOR.MINOR.PATCH:

  • MAJOR is bumped when incompatible API changes are made.

  • MINOR is bumped when functionality is added in a backward-compatible manner.

  • PATCH is bumped when backward-compatible bug fixes are made.

Unreleased (YYYY-MM-DD)

Changes since previous release

Added

  • Add runtime check that provided C++ bit field setter value is in range.

6.1.0 (13 november 2024)

Changes since previous release

Added

6.0.1 (27 august 2024)

Changes since previous release

Fixes

  • Fix PyPI release version requirement conflict related to tsfpga.

6.0.0 (25 august 2024)

Changes since previous release

Breaking changes

  • Update data file (TOML, JSON, etc) format in a way that is not compatible with old files. See New data file format in version 6.0.0. Note that old files are automatically updated. This change enables:

    • Fully user-configurable ordering and grouping of registers and register arrays.

    • Fully user-configurable ordering and grouping of fields in a register.

  • Rename RegisterList.get_register() argument name to register_name.

Breaking internal API changes

5.2.0 (7 may 2024)

Changes since previous release

Added

  • Add Python generator to read/write/print register and field values on a target device. See usage instructions here.

Requires tsfpga version 12.3.2 or later.

5.1.3 (3 april 2024)

Changes since previous release

Fixes

  • Peg rtoml dependency package to 0.9.X so that pip install works on 64-bit Windows.

5.1.2 (11 march 2024)

Changes since previous release

Fixes

5.1.1 (8 march 2024)

Changes since previous release

Changes

Requires tsfpga version 12.3.1 or later.

5.1.0 (5 february 2024)

Changes since previous release

Added

  • Add generation of simulation support package that checks field values to VhdlSimulationCheckPackageGenerator.

    • Uses VUnit Verification Components for bus operations.

    • Generates a check_equal procedure for each field in each readable register.

    • Use native VHDL type for value representation.

5.0.0 (25 january 2024)

Changes since previous release

Fixes

Added

Breaking changes

4.1.0 (2 november 2023)

Changes since previous release

Added

  • Add support for negative-range integer fields.

4.0.2 (18 october 2023)

Changes since previous release

Fix required Python version in PyPI package.

4.0.1 (11 october 2023)

Changes since previous release

Fix PyPI link to release notes.

4.0.0 (11 october 2023)

Changes since previous release

Fixes

  • Use double data type for generated C/C++ header floating-point constants. Matches the precision in the generated VHDL code.

Breaking changes

  • Break up hdl_registers.Constant class into BooleanConstant, FloatConstant, IntegerConstant and StringConstant that are placed in new constant sub-package.

  • Move BitVector, Bit and RegisterField classes and register_field_type module from top-level to field sub-package.

  • Move HtmlTranslator, RegisterCGenerator, RegisterCodeGenerator, RegisterCppGenerator, RegisterHtmlGenerator, RegisterPythonGenerator and RegisterVhdlGenerator classes from top-level to generator sub-package.

  • Rename RegisterField.range to RegisterField.range_str().

  • Remove default value description=None for argument to RegisterList.add_constant().

  • Remove public method vhdl_typedef from FieldType class. This logic is instead moved to RegisterVhdlGenerator.

  • Remove the largely unused “Value (hexadecimal)” constant information column from HTML generator.

  • Remove textual descriptions of registers/arrays/fields/constants from generated C header.

Added

  • Add support for unsigned bit vector constants via the UnsignedVectorConstant class.

  • Add support for ranged integer register fields via the Integer class.

  • Add support for enumeration register fields via the Enumeration class.

3.1.0 (25 april 2023)

Changes since previous release

Added

  • Add support for register constants of type string.

3.0.2 (4 march 2023)

Changes since previous release

Added

  • Add more comments to generated VHDL.

3.0.1 (3 march 2023)

Changes since previous release

  • Update project slogan on PyPI to fit within 98 characters.

3.0.0 (3 march 2023)

Changes since previous release

Added

  • Add field setters and getters to RegisterCppGenerator.

  • Add *_MASK_INVERSE defines for fields to RegisterCGenerator.

  • Add support for register constants of boolean and floating point type.

Breaking changes

  • Remove the field _mask and _shift public constants from the generated C++ interface header. These are not needed now that setters and getters are available.

  • Change to use unresolved VHDL types in RegisterVhdlGenerator class.

    • std_ulogic_vector instead of std_logic_vector.

    • u_signed instead of signed.

    • u_unsigned instead of unsigned.

Changes

  • Increase TOML parsing performance by using tomli Python package instead of tomlkit.

2.1.0 (1 april 2022)

Changes since previous release

Added

  • Add .RegisterList.create_python_class method to create a Python pickle file. Read more here.

  • Add optional field_type argument to RegisterList.append_register() and Register.

  • Add support for generating ieee.fixed_pkg types in RegisterVhdlGenerator class based on the register field_type.

Fixed

  • Fix bug where setting default value for bit 31 in a register could fail.

2.0.1 (22 october 2021)

Changes since previous release

Second release to test PyPI deploy. Functionality is identical to tsfpga version 9.0.0.

2.0.0 (22 october 2021)

Initial release to test PyPI deploy. Functionality is identical to tsfpga version 9.0.0.