Documentation of caesar registers

This document is a specification for the register interface of the FPGA module caesar.

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Register modes

The following register modes are available.

Mode Description
Read Software can read a value that hardware provides.
Write Software can write a value that is available for hardware usage.
Read, Write Software can write a value and read it back. The written value is available for hardware usage.
Write-pulse Software can write a value that is asserted for one clock cycle in hardware.
Read, Write-pulse Software can read a value that hardware provides. Software can write a value that is asserted for one clock cycle in hardware.

Registers

This module does not have any registers.

Constants

The following constants are part of the register interface.

Name Value Description
axi_data_width 64 Data width of the AXI port used by this module.
burst_length_beats 256