Coverage for hdl_registers/generator/python/test/accessor/test_accessor_operations.py: 100%
311 statements
« prev ^ index » next coverage.py v7.6.8, created at 2024-12-01 20:50 +0000
« prev ^ index » next coverage.py v7.6.8, created at 2024-12-01 20:50 +0000
1# --------------------------------------------------------------------------------------------------
2# Copyright (c) Lukas Vik. All rights reserved.
3#
4# This file is part of the hdl-registers project, an HDL register generator fast enough to run
5# in real time.
6# https://hdl-registers.com
7# https://github.com/hdl-registers/hdl-registers
8# --------------------------------------------------------------------------------------------------
10# Standard libraries
11import contextlib
12import io
13from dataclasses import dataclass
14from enum import Enum
15from typing import Optional
16from unittest.mock import Mock
18# Third party libraries
19import pytest
21# First party libraries
22from hdl_registers.generator.python.register_accessor_interface import (
23 PythonRegisterAccessorInterface,
24)
26# False positive for pytest fixtures
27# pylint: disable=redefined-outer-name
30@pytest.fixture
31def default_accessor(generate_default_accessor):
32 """
33 Set up mocks and an object to perform common operations.
34 Needs to be function-scoped since we want to check mock calls for each test.
35 """
36 tmp_path_session, python_module = generate_default_accessor
38 register_accessor = Mock(spec=PythonRegisterAccessorInterface)
39 test_accessor = python_module.get_accessor(register_accessor=register_accessor)
41 class DefaultAccessor:
42 def __init__(self):
43 self.tmp_path_session = tmp_path_session
44 self.python_module = python_module
45 self.register_accessor = register_accessor
46 self.test_accessor = test_accessor
48 def set_read_value(self, value: int):
49 self.register_accessor.read_register.return_value = value
51 def assert_call(
52 self,
53 read_index: Optional[int] = None,
54 write_index: Optional[int] = None,
55 write_value: Optional[int] = None,
56 ):
57 if read_index is None:
58 self.register_accessor.read_register.assert_not_called()
59 else:
60 self.register_accessor.read_register.assert_called_once_with(
61 register_list_name="test", register_address=4 * read_index
62 )
64 if write_index is None:
65 self.register_accessor.write_register.assert_not_called()
66 else:
67 self.register_accessor.write_register.assert_called_once_with(
68 register_list_name="test",
69 register_address=4 * write_index,
70 register_value=write_value,
71 )
73 return DefaultAccessor()
76SAMPLE_U32_0 = 0b10101010101010101010101010101010
77SAMPLE_U32_1 = 0b01010101010101010101010101010101
80# ==================================================================================================
81# Test values for the 'test_register' with the 'a' fields.
82# ==================================================================================================
85def get_a_value_int( # pylint: disable=too-many-arguments
86 bit_aa0=0b0,
87 bit_aa1=0b1,
88 unsigned_aa=0b0101,
89 signed_aa=0b1010,
90 ufixed_aa=0b0110,
91 sfixed_aa=0b1001,
92 enumeration_aa=0b01,
93 uint_aa=0b0101,
94 sint_aa=0b00010,
95):
96 """
97 Default argument values correspond to the default values in the register.
98 """
99 return (
100 (bit_aa0 << 0)
101 + (bit_aa1 << 1)
102 + (unsigned_aa << 2)
103 + (signed_aa << 6)
104 + (ufixed_aa << 10)
105 + (sfixed_aa << 14)
106 + (enumeration_aa << 18)
107 + (uint_aa << 20)
108 + (sint_aa << 24)
109 )
112def a_value0_int( # pylint: disable=too-many-arguments
113 bit_aa0=0b0,
114 bit_aa1=0b1,
115 unsigned_aa=0b0110,
116 signed_aa=0b1001,
117 ufixed_aa=0b1100,
118 sfixed_aa=0b1101,
119 enumeration_aa=0b10,
120 uint_aa=0b1010,
121 sint_aa=0b11011,
122):
123 return get_a_value_int(
124 bit_aa0=bit_aa0,
125 bit_aa1=bit_aa1,
126 unsigned_aa=unsigned_aa,
127 signed_aa=signed_aa,
128 ufixed_aa=ufixed_aa,
129 sfixed_aa=sfixed_aa,
130 enumeration_aa=enumeration_aa,
131 uint_aa=uint_aa,
132 sint_aa=sint_aa,
133 )
136def a_value0_class(value_class, uint_aa=10):
137 return value_class(
138 bit_aa0=0,
139 bit_aa1=1,
140 unsigned_aa=6,
141 signed_aa=-7,
142 ufixed_aa=3.0,
143 sfixed_aa=-0.375,
144 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA2,
145 uint_aa=uint_aa,
146 sint_aa=-5,
147 )
150def a_value1_int( # pylint: disable=too-many-arguments
151 bit_aa0=0b1,
152 bit_aa1=0b0,
153 unsigned_aa=0b1111,
154 signed_aa=0b1101,
155 ufixed_aa=0b1011,
156 sfixed_aa=0b1110,
157 enumeration_aa=0b00,
158 uint_aa=0b0101,
159 sint_aa=0b00011,
160):
161 return get_a_value_int(
162 bit_aa0=bit_aa0,
163 bit_aa1=bit_aa1,
164 unsigned_aa=unsigned_aa,
165 signed_aa=signed_aa,
166 ufixed_aa=ufixed_aa,
167 sfixed_aa=sfixed_aa,
168 enumeration_aa=enumeration_aa,
169 uint_aa=uint_aa,
170 sint_aa=sint_aa,
171 )
174def a_value1_class(value_class):
175 return value_class(
176 bit_aa0=1,
177 bit_aa1=0,
178 unsigned_aa=15,
179 signed_aa=-3,
180 ufixed_aa=2.75,
181 sfixed_aa=-0.25,
182 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA0,
183 uint_aa=5,
184 sint_aa=3,
185 )
188def a_value2_int( # pylint: disable=too-many-arguments
189 bit_aa0=0b0,
190 bit_aa1=0b1,
191 unsigned_aa=0b0010,
192 signed_aa=0b1101,
193 ufixed_aa=0b1100,
194 sfixed_aa=0b1000,
195 enumeration_aa=0b10,
196 uint_aa=0b0111,
197 sint_aa=0b01010,
198):
199 return get_a_value_int(
200 bit_aa0=bit_aa0,
201 bit_aa1=bit_aa1,
202 unsigned_aa=unsigned_aa,
203 signed_aa=signed_aa,
204 ufixed_aa=ufixed_aa,
205 sfixed_aa=sfixed_aa,
206 enumeration_aa=enumeration_aa,
207 uint_aa=uint_aa,
208 sint_aa=sint_aa,
209 )
212def a_value2_class(value_class):
213 return value_class(
214 bit_aa0=0,
215 bit_aa1=1,
216 unsigned_aa=2,
217 signed_aa=-3,
218 ufixed_aa=3.0,
219 sfixed_aa=-1.0,
220 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA2,
221 uint_aa=7,
222 sint_aa=10,
223 )
226# ==================================================================================================
229# ==================================================================================================
230# Read empty registers.
231# Methods should take integer value.
232#
233# Variants:
234# * Array registers, plain registers.
235# * Mode: r, r_w, r_wpulse
236#
237# 6 tests in total.
238# ==================================================================================================
241def test_read_empty_r_register_plain(default_accessor):
242 default_accessor.set_read_value(SAMPLE_U32_0)
243 assert default_accessor.test_accessor.read_empty_r() == SAMPLE_U32_0
245 default_accessor.assert_call(read_index=5)
248def test_read_empty_r_w_register_plain(default_accessor):
249 default_accessor.set_read_value(SAMPLE_U32_1)
250 assert default_accessor.test_accessor.read_empty_r_w() == SAMPLE_U32_1
252 default_accessor.assert_call(read_index=7)
255def test_read_empty_r_wpulse_register_plain(default_accessor):
256 default_accessor.set_read_value(SAMPLE_U32_0)
257 assert default_accessor.test_accessor.read_empty_r_wpulse() == SAMPLE_U32_0
259 default_accessor.assert_call(read_index=9)
262def test_read_empty_r_register_in_array(default_accessor):
263 default_accessor.set_read_value(SAMPLE_U32_0)
264 assert default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=2) == SAMPLE_U32_0
266 default_accessor.assert_call(read_index=15 + 2 * 15 + 5)
269def test_read_empty_r_w_register_in_array(default_accessor):
270 default_accessor.set_read_value(SAMPLE_U32_1)
271 assert default_accessor.test_accessor.read_reg_array_a_empty_r_w(array_index=2) == SAMPLE_U32_1
273 default_accessor.assert_call(read_index=15 + 2 * 15 + 7)
276def test_read_empty_r_wpulse_register_in_array(default_accessor):
277 default_accessor.set_read_value(SAMPLE_U32_0)
278 assert (
279 default_accessor.test_accessor.read_reg_array_a_empty_r_wpulse(array_index=2)
280 == SAMPLE_U32_0
281 )
283 default_accessor.assert_call(read_index=15 + 2 * 15 + 9)
286# ==================================================================================================
289# ==================================================================================================
290# Write empty registers.
291# Methods should take integer argument values.
292#
293# Variants:
294# * Array registers, plain registers.
295# * Mode: w, r_w, wpulse, r_wpulse
296#
297# 8 tests in total.
298# ==================================================================================================
301def test_write_empty_w_register_plain(default_accessor):
302 default_accessor.test_accessor.write_empty_w(register_value=SAMPLE_U32_1)
304 default_accessor.assert_call(write_index=6, write_value=SAMPLE_U32_1)
307def test_write_empty_r_w_register_plain(default_accessor):
308 default_accessor.test_accessor.write_empty_r_w(register_value=SAMPLE_U32_0)
310 default_accessor.assert_call(write_index=7, write_value=SAMPLE_U32_0)
313def test_write_empty_wpulse_register_plain(default_accessor):
314 default_accessor.test_accessor.write_empty_wpulse(register_value=SAMPLE_U32_1)
316 default_accessor.assert_call(write_index=8, write_value=SAMPLE_U32_1)
319def test_write_empty_r_wpulse_register_plain(default_accessor):
320 default_accessor.test_accessor.write_empty_r_wpulse(register_value=SAMPLE_U32_0)
322 default_accessor.assert_call(write_index=9, write_value=SAMPLE_U32_0)
325def test_write_empty_w_register_in_array(default_accessor):
326 default_accessor.test_accessor.write_reg_array_a_empty_w(
327 register_value=SAMPLE_U32_1, array_index=2
328 )
330 default_accessor.assert_call(write_index=15 + 2 * 15 + 6, write_value=SAMPLE_U32_1)
333def test_write_empty_r_w_register_in_array(default_accessor):
334 default_accessor.test_accessor.write_reg_array_a_empty_r_w(
335 register_value=SAMPLE_U32_0, array_index=2
336 )
338 default_accessor.assert_call(write_index=15 + 2 * 15 + 7, write_value=SAMPLE_U32_0)
341def test_write_empty_wpulse_register_in_array(default_accessor):
342 default_accessor.test_accessor.write_reg_array_a_empty_wpulse(
343 register_value=SAMPLE_U32_1, array_index=2
344 )
346 default_accessor.assert_call(write_index=15 + 2 * 15 + 8, write_value=SAMPLE_U32_1)
349def test_write_empty_r_wpulse_register_in_array(default_accessor):
350 default_accessor.test_accessor.write_reg_array_a_empty_r_wpulse(
351 register_value=SAMPLE_U32_0, array_index=2
352 )
354 default_accessor.assert_call(write_index=15 + 2 * 15 + 9, write_value=SAMPLE_U32_0)
357# ==================================================================================================
360# ==================================================================================================
361# Read registers with value converted to value class.
362# Methods should return class object.
363#
364# Variants:
365# * Array registers, plain registers.
366# * Mode: r, r_w, r_wpulse
367#
368# 6 tests in total.
369# ==================================================================================================
372def test_read_class_r_plain(default_accessor):
373 default_accessor.set_read_value(a_value0_int())
374 assert default_accessor.test_accessor.read_reg_r() == a_value0_class(
375 default_accessor.python_module.TestRegRValue
376 )
378 default_accessor.assert_call(read_index=0)
381def test_read_class_r_w_plain(default_accessor):
382 default_accessor.set_read_value(a_value1_int())
383 assert default_accessor.test_accessor.read_reg_r_w() == a_value1_class(
384 default_accessor.python_module.TestRegRWValue
385 )
387 default_accessor.assert_call(read_index=2)
390def test_read_class_r_wpulse_plain(default_accessor):
391 default_accessor.set_read_value(a_value2_int())
392 assert default_accessor.test_accessor.read_reg_r_wpulse() == a_value2_class(
393 default_accessor.python_module.TestRegRWpulseValue
394 )
396 default_accessor.assert_call(read_index=4)
399def test_read_class_r_in_array(default_accessor):
400 default_accessor.set_read_value(a_value2_int())
401 assert default_accessor.test_accessor.read_reg_array_a_reg_r(array_index=2) == a_value2_class(
402 default_accessor.python_module.TestRegArrayARegRValue
403 )
405 default_accessor.assert_call(read_index=15 + 2 * 15 + 0)
408def test_read_class_r_w_in_array(default_accessor):
409 default_accessor.set_read_value(a_value1_int())
410 assert default_accessor.test_accessor.read_reg_array_a_reg_r_w(array_index=2) == a_value1_class(
411 default_accessor.python_module.TestRegArrayARegRWValue
412 )
414 default_accessor.assert_call(read_index=15 + 2 * 15 + 2)
417def test_read_class_r_wpulse_in_array(default_accessor):
418 default_accessor.set_read_value(a_value0_int())
419 assert default_accessor.test_accessor.read_reg_array_a_reg_r_wpulse(
420 array_index=1
421 ) == a_value0_class(default_accessor.python_module.TestRegArrayARegRWpulseValue)
423 default_accessor.assert_call(read_index=15 + 1 * 15 + 4)
426# ==================================================================================================
429# ==================================================================================================
430# Write registers with value class.
431# Methods should take class objects.
432#
433# Variants:
434# * Array registers, plain registers.
435# * Mode: w, r_w, wpulse, r_wpulse
436#
437# 8 tests in total.
438# ==================================================================================================
441def test_write_class_w_plain(default_accessor):
442 default_accessor.test_accessor.write_reg_w(
443 register_value=a_value0_class(default_accessor.python_module.TestRegWValue),
444 )
446 default_accessor.assert_call(write_index=1, write_value=a_value0_int())
449def test_write_class_r_w_plain(default_accessor):
450 default_accessor.test_accessor.write_reg_r_w(
451 register_value=a_value1_class(default_accessor.python_module.TestRegRWValue),
452 )
454 default_accessor.assert_call(write_index=2, write_value=a_value1_int())
457def test_write_class_wpulse_plain(default_accessor):
458 default_accessor.test_accessor.write_reg_wpulse(
459 register_value=a_value2_class(default_accessor.python_module.TestRegWpulseValue),
460 )
462 default_accessor.assert_call(write_index=3, write_value=a_value2_int())
465def test_write_class_r_wpulse_plain(default_accessor):
466 default_accessor.test_accessor.write_reg_r_wpulse(
467 register_value=a_value0_class(default_accessor.python_module.TestRegRWpulseValue),
468 )
470 default_accessor.assert_call(write_index=4, write_value=a_value0_int())
473def test_write_class_w_in_array(default_accessor):
474 default_accessor.test_accessor.write_reg_array_a_reg_w(
475 register_value=a_value1_class(default_accessor.python_module.TestRegArrayARegWValue),
476 array_index=2,
477 )
479 default_accessor.assert_call(write_index=15 + 2 * 15 + 1, write_value=a_value1_int())
482def test_write_class_r_w_in_array(default_accessor):
483 default_accessor.test_accessor.write_reg_array_a_reg_r_w(
484 register_value=a_value2_class(default_accessor.python_module.TestRegArrayARegRWValue),
485 array_index=1,
486 )
488 default_accessor.assert_call(write_index=15 + 1 * 15 + 2, write_value=a_value2_int())
491def test_write_class_wpulse_in_array(default_accessor):
492 default_accessor.test_accessor.write_reg_array_a_reg_wpulse(
493 register_value=a_value0_class(default_accessor.python_module.TestRegArrayARegRWpulseValue),
494 array_index=2,
495 )
497 default_accessor.assert_call(write_index=15 + 2 * 15 + 3, write_value=a_value0_int())
500def test_write_class_r_wpulse_in_array(default_accessor):
501 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse(
502 register_value=a_value1_class(default_accessor.python_module.TestRegArrayARegRWpulseValue),
503 array_index=0,
504 )
506 default_accessor.assert_call(write_index=15 + 0 * 15 + 4, write_value=a_value1_int())
509# ==================================================================================================
512# ==================================================================================================
513# Write field to register that has only a single field.
514# Methods should take native type.
515#
516# Variants:
517# * Array registers, plain registers.
518# * Mode: w, r_w, wpulse, r_wpulse
519# * Type: bit, unsigned, signed, ufixed, sfixed, enumeration, uint, sint
520#
521# We test a subset of all possible combinations. Most important is to try the different types.
522# ==================================================================================================
525def test_write_field_w_plain_single_bit(default_accessor):
526 default_accessor.test_accessor.write_single_w_bit_bit_bb(field_value=1)
528 default_accessor.assert_call(write_index=10, write_value=0b1)
531def test_write_field_w_plain_single_unsigned(default_accessor):
532 default_accessor.test_accessor.write_single_w_unsigned_unsigned_bb(field_value=15)
534 default_accessor.assert_call(write_index=11, write_value=0b1111)
537def test_write_field_r_w_plain_single_sfixed(default_accessor):
538 default_accessor.test_accessor.write_single_r_w_sfixed_sfixed_bb(field_value=-1.75)
540 default_accessor.assert_call(write_index=12, write_value=0b1001)
543def test_write_field_wpulse_plain_single_enumeration(default_accessor):
544 field_value = (
545 default_accessor.python_module.TestSingleWpulseEnumerationValue.EnumerationBb.ELEMENT_BB2
546 )
547 default_accessor.test_accessor.write_single_wpulse_enumeration_enumeration_bb(
548 field_value=field_value
549 )
551 default_accessor.assert_call(write_index=13, write_value=0b10)
554def test_write_field_r_wpulse_plain_single_uint(default_accessor):
555 default_accessor.test_accessor.write_single_r_wpulse_uint_uint_bb(field_value=11)
557 default_accessor.assert_call(write_index=14, write_value=0b1011)
560def test_write_field_r_w_in_array_single_sfixed(default_accessor):
561 default_accessor.test_accessor.write_reg_array_a_single_r_w_sfixed_sfixed_bb(
562 field_value=1.5, array_index=2
563 )
565 default_accessor.assert_call(write_index=15 + 15 * 2 + 12, write_value=0b0110)
568def test_write_field_wpulse_in_array_single_enumeration(default_accessor):
569 register_value_class = default_accessor.python_module.TestRegArrayASingleWpulseEnumerationValue
570 field_value = register_value_class.EnumerationBb.ELEMENT_BB1
571 default_accessor.test_accessor.write_reg_array_a_single_wpulse_enumeration_enumeration_bb(
572 field_value=field_value, array_index=1
573 )
575 default_accessor.assert_call(write_index=15 + 15 * 1 + 13, write_value=0b01)
578# ==================================================================================================
581# ==================================================================================================
582# Write field to register that has multiple fields.
583# Methods should take native type.
584#
585# Variants:
586# * Array registers, plain registers.
587# * Mode: w, r_w, wpulse, r_wpulse
588# * Type: bit, unsigned, signed, ufixed, sfixed, enumeration, uint, sint
589#
590# Mode 'r_w' should do a read-modify-write.
591# Mode 'w', 'wpulse' and 'r_wpulse' should do a write with all other fields set to default.
592#
593# We test a subset of all possible combinations.
594# ==================================================================================================
597def test_write_field_w_plain_multiple_bit_aa0(default_accessor):
598 default_accessor.test_accessor.write_reg_w_bit_aa0(field_value=1)
600 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(bit_aa0=0b1))
603def test_write_field_w_plain_multiple_bit_aa1(default_accessor):
604 default_accessor.test_accessor.write_reg_w_bit_aa1(field_value=0)
606 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(bit_aa1=0b0))
609def test_write_field_w_plain_multiple_unsigned_aa(default_accessor):
610 default_accessor.test_accessor.write_reg_w_unsigned_aa(field_value=9)
612 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(unsigned_aa=0b1001))
615def test_write_field_wpulse_plain_multiple_signed_aa(default_accessor):
616 default_accessor.test_accessor.write_reg_wpulse_signed_aa(field_value=-3)
618 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(signed_aa=0b1101))
621def test_write_field_wpulse_plain_multiple_ufixed_aa(default_accessor):
622 default_accessor.test_accessor.write_reg_wpulse_ufixed_aa(field_value=3.25)
624 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(ufixed_aa=0b1101))
627def test_write_field_wpulse_plain_multiple_sfixed_aa(default_accessor):
628 default_accessor.test_accessor.write_reg_wpulse_sfixed_aa(field_value=-0.75)
630 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(sfixed_aa=0b1010))
633def test_write_field_r_wpulse_in_array_multiple_enumeration_aa(default_accessor):
634 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_enumeration_aa(
635 field_value=default_accessor.python_module.TestRegRWpulseValue.EnumerationAa.ELEMENT_AA2,
636 array_index=0,
637 )
639 default_accessor.assert_call(
640 write_index=15 + 15 * 0 + 4, write_value=get_a_value_int(enumeration_aa=0b10)
641 )
644def test_write_field_r_wpulse_in_array_multiple_uint_aa(default_accessor):
645 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_uint_aa(
646 field_value=10, array_index=1
647 )
649 default_accessor.assert_call(
650 write_index=15 + 15 * 1 + 4, write_value=get_a_value_int(uint_aa=0b1010)
651 )
654def test_write_field_r_wpulse_in_array_multiple_sint_aa(default_accessor):
655 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_sint_aa(
656 field_value=-3, array_index=2
657 )
659 default_accessor.assert_call(
660 write_index=15 + 15 * 2 + 4, write_value=get_a_value_int(sint_aa=0b11101)
661 )
664def test_write_field_r_w_plain_multiple_bit_aa0(default_accessor):
665 default_accessor.set_read_value(a_value0_int())
666 default_accessor.test_accessor.write_reg_r_w_bit_aa0(field_value=1)
668 default_accessor.assert_call(read_index=2, write_index=2, write_value=a_value0_int(bit_aa0=0b1))
671def test_write_field_r_w_plain_multiple_bit_aa1(default_accessor):
672 default_accessor.set_read_value(a_value0_int())
673 default_accessor.test_accessor.write_reg_r_w_bit_aa1(field_value=0)
675 default_accessor.assert_call(read_index=2, write_index=2, write_value=a_value0_int(bit_aa1=0b0))
678def test_write_field_r_w_plain_multiple_unsigned_aa(default_accessor):
679 default_accessor.set_read_value(a_value0_int())
680 default_accessor.test_accessor.write_reg_r_w_unsigned_aa(field_value=9)
682 default_accessor.assert_call(
683 read_index=2, write_index=2, write_value=a_value0_int(unsigned_aa=0b1001)
684 )
687def test_write_field_r_w_plain_multiple_signed_aa(default_accessor):
688 default_accessor.set_read_value(a_value1_int())
689 default_accessor.test_accessor.write_reg_r_w_signed_aa(field_value=-3)
691 default_accessor.assert_call(
692 read_index=2, write_index=2, write_value=a_value1_int(signed_aa=0b1101)
693 )
696def test_write_field_r_w_plain_multiple_ufixed_aa(default_accessor):
697 default_accessor.set_read_value(a_value1_int())
698 default_accessor.test_accessor.write_reg_r_w_ufixed_aa(field_value=3.25)
700 default_accessor.assert_call(
701 read_index=2, write_index=2, write_value=a_value1_int(ufixed_aa=0b1101)
702 )
705def test_write_field_r_w_plain_multiple_sfixed_aa(default_accessor):
706 default_accessor.set_read_value(a_value1_int())
707 default_accessor.test_accessor.write_reg_r_w_sfixed_aa(field_value=-0.75)
709 default_accessor.assert_call(
710 read_index=2,
711 write_index=2,
712 write_value=a_value1_int(sfixed_aa=0b1010),
713 )
716def test_write_field_r_w_in_array_multiple_enumeration_aa(default_accessor):
717 default_accessor.set_read_value(a_value2_int())
718 default_accessor.test_accessor.write_reg_array_a_reg_r_w_enumeration_aa(
719 field_value=default_accessor.python_module.TestRegRWValue.EnumerationAa.ELEMENT_AA2,
720 array_index=0,
721 )
723 default_accessor.assert_call(
724 read_index=15 + 15 * 0 + 2,
725 write_index=15 + 15 * 0 + 2,
726 write_value=a_value2_int(enumeration_aa=0b10),
727 )
730def test_write_field_r_w_in_array_multiple_uint_aa(default_accessor):
731 default_accessor.set_read_value(a_value2_int())
732 default_accessor.test_accessor.write_reg_array_a_reg_r_w_uint_aa(field_value=10, array_index=1)
734 default_accessor.assert_call(
735 read_index=15 + 15 * 1 + 2,
736 write_index=15 + 15 * 1 + 2,
737 write_value=a_value2_int(uint_aa=0b1010),
738 )
741def test_write_field_r_w_in_array_multiple_sint_aa(default_accessor):
742 default_accessor.set_read_value(a_value2_int())
743 default_accessor.test_accessor.write_reg_array_a_reg_r_w_sint_aa(field_value=-3, array_index=2)
745 default_accessor.assert_call(
746 read_index=15 + 15 * 2 + 2,
747 write_index=15 + 15 * 2 + 2,
748 write_value=a_value2_int(sint_aa=0b11101),
749 )
752# ==================================================================================================
755# ==================================================================================================
756# Basic tests
757# ==================================================================================================
760def test_read_with_array_index_out_of_bound_should_raise_exception(default_accessor):
761 with pytest.raises(ValueError) as exception_info:
762 default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=3)
763 assert (
764 str(exception_info.value)
765 == 'Index 3 out of range for register array "reg_array_a" of length 3.'
766 )
769def test_read_with_array_index_negative_should_raise_exception(default_accessor):
770 with pytest.raises(ValueError) as exception_info:
771 default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=-1)
772 assert (
773 str(exception_info.value)
774 == 'Index -1 out of range for register array "reg_array_a" of length 3.'
775 )
778def test_read_integer_out_of_range_should_raise_exception(default_accessor):
779 default_accessor.set_read_value(a_value0_int(uint_aa=0b1111))
781 with pytest.raises(ValueError) as exception_info:
782 default_accessor.test_accessor.read_reg_r_w()
783 assert (
784 str(exception_info.value)
785 == 'Register field value "15" not inside "uint_aa" field\'s legal range: (0, 10).'
786 )
789def test_read_enumeration_out_of_range_should_raise_exception(default_accessor):
790 default_accessor.set_read_value(a_value0_int(enumeration_aa=0b11))
792 with pytest.raises(ValueError) as exception_info:
793 default_accessor.test_accessor.read_reg_r_w()
794 assert (
795 str(exception_info.value)
796 == 'Enumeration "enumeration_aa", requested element value does not exist. Got: "3".'
797 )
800def test_write_integer_out_of_range_should_raise_exception(default_accessor):
801 with pytest.raises(ValueError) as exception_info:
802 default_accessor.test_accessor.write_reg_r_w(
803 a_value0_class(value_class=default_accessor.python_module.TestRegRWValue, uint_aa=15)
804 )
805 assert (
806 str(exception_info.value)
807 == 'Value "15" not inside "uint_aa" field\'s legal range: (0, 10).'
808 )
811def test_write_enumeration_out_of_range_should_raise_exception(default_accessor):
812 @dataclass
813 class ValueClass: # pylint: disable=too-many-instance-attributes
814 class EnumerationAa(Enum):
815 ELEMENT_AA0 = 1
816 ELEMENT_AA1 = 2
817 ELEMENT_AA2 = 3
819 bit_aa0: int
820 bit_aa1: int
821 unsigned_aa: int
822 signed_aa: int
823 ufixed_aa: float
824 sfixed_aa: float
825 enumeration_aa: EnumerationAa
826 uint_aa: int
827 sint_aa: int
829 with pytest.raises(ValueError) as exception_info:
830 default_accessor.test_accessor.write_reg_r_w(a_value0_class(value_class=ValueClass))
831 assert (
832 str(exception_info.value)
833 == 'Enumeration "enumeration_aa", requested element name does not exist. Got: "3".'
834 )
837def test_register_accessor_read_value_out_of_range_should_raise_exception(default_accessor):
838 default_accessor.set_read_value(2**32)
839 with pytest.raises(ValueError) as exception_info:
840 default_accessor.test_accessor.read_reg_r_w()
841 assert (
842 str(exception_info.value)
843 == 'Register read value "4294967296" from accessor is out of range.'
844 )
846 default_accessor.set_read_value(-1)
847 with pytest.raises(ValueError) as exception_info:
848 default_accessor.test_accessor.read_reg_r_w()
849 assert str(exception_info.value) == 'Register read value "-1" from accessor is out of range.'
852def test_register_write_value_out_of_range_should_raise_exception(default_accessor):
853 with pytest.raises(ValueError) as exception_info:
854 default_accessor.test_accessor.write_empty_w(register_value=2**32)
855 assert str(exception_info.value) == 'Register write value "4294967296" is out of range.'
857 with pytest.raises(ValueError) as exception_info:
858 default_accessor.test_accessor.write_empty_w(register_value=-1)
859 assert str(exception_info.value) == 'Register write value "-1" is out of range.'
862# ==================================================================================================
865# ==================================================================================================
866# Test printing
867# ==================================================================================================
870def test_print_registers(default_accessor):
871 default_accessor.set_read_value(a_value0_int())
873 string_io = io.StringIO()
874 with contextlib.redirect_stdout(string_io):
875 default_accessor.test_accessor.print_registers()
876 stdout = string_io.getvalue()
878 # To inspect:
879 # print(stdout)
880 # assert False
882 values = """\
883 bit_aa0: 0
884 bit_aa1: 1
885 unsigned_aa: 6 (hexadecimal 6, binary 0110)
886 signed_aa: -7 (unsigned decimal 9, hexadecimal 9, binary 1001)
887 ufixed_aa: 3.0 (unsigned decimal 12, hexadecimal C, binary 1100)
888 sfixed_aa: -0.375 (unsigned decimal 13, hexadecimal D, binary 1101)
889 enumeration_aa: ELEMENT_AA2 (2)
890 uint_aa: 10 (hexadecimal A, binary 1010)
891 sint_aa: -5 (unsigned decimal 27, hexadecimal 1B, binary 1_1011)
892"""
894 assert (
895 f"""\
896Register 'reg_r' .............................................................. \
897(index 0, address 0):
898{values}
899"""
900 in stdout
901 )
903 assert (
904 f"""
905Register 'reg_array_a[2].reg_r_wpulse' ........................................ \
906(index 49, address 196):
907{values}
908"""
909 in stdout
910 )
911 assert (
912 """
913Register 'reg_array_a[2].reg_wpulse' .......................................... \
914(index 48, address 192):
915 Not readable.
916"""
917 in stdout
918 )
921def test_print_registers_value1(default_accessor):
922 default_accessor.set_read_value(a_value1_int())
924 string_io = io.StringIO()
925 with contextlib.redirect_stdout(string_io):
926 default_accessor.test_accessor.print_registers()
927 stdout = string_io.getvalue()
929 values = """\
930 bit_aa0: 1
931 bit_aa1: 0
932 unsigned_aa: 15 (hexadecimal F, binary 1111)
933 signed_aa: -3 (unsigned decimal 13, hexadecimal D, binary 1101)
934 ufixed_aa: 2.75 (unsigned decimal 11, hexadecimal B, binary 1011)
935 sfixed_aa: -0.25 (unsigned decimal 14, hexadecimal E, binary 1110)
936 enumeration_aa: ELEMENT_AA0 (0)
937 uint_aa: 5 (hexadecimal 5, binary 0101)
938 sint_aa: 3 (unsigned decimal 3, hexadecimal 03, binary 0_0011)
939"""
941 assert (
942 f"""\
943Register 'reg_r' .............................................................. \
944(index 0, address 0):
945{values}
946"""
947 in stdout
948 )
951def test_print_registers_value2(default_accessor):
952 default_accessor.set_read_value(a_value2_int())
954 string_io = io.StringIO()
955 with contextlib.redirect_stdout(string_io):
956 default_accessor.test_accessor.print_registers()
957 stdout = string_io.getvalue()
959 values = """\
960 bit_aa0: 0
961 bit_aa1: 1
962 unsigned_aa: 2 (hexadecimal 2, binary 0010)
963 signed_aa: -3 (unsigned decimal 13, hexadecimal D, binary 1101)
964 ufixed_aa: 3.0 (unsigned decimal 12, hexadecimal C, binary 1100)
965 sfixed_aa: -1.0 (unsigned decimal 8, hexadecimal 8, binary 1000)
966 enumeration_aa: ELEMENT_AA2 (2)
967 uint_aa: 7 (hexadecimal 7, binary 0111)
968 sint_aa: 10 (unsigned decimal 10, hexadecimal 0A, binary 0_1010)
969"""
971 assert (
972 f"""\
973Register 'reg_r' .............................................................. \
974(index 0, address 0):
975{values}
976"""
977 in stdout
978 )
981# ==================================================================================================