Coverage for hdl_registers/generator/python/test/accessor/test_accessor_operations.py: 100%

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1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the hdl-registers project, an HDL register generator fast enough to run 

5# in real time. 

6# https://hdl-registers.com 

7# https://github.com/hdl-registers/hdl-registers 

8# -------------------------------------------------------------------------------------------------- 

9 

10from __future__ import annotations 

11 

12import contextlib 

13import io 

14from dataclasses import dataclass 

15from enum import Enum 

16from unittest.mock import Mock 

17 

18import pytest 

19 

20from hdl_registers.generator.python.register_accessor_interface import ( 

21 PythonRegisterAccessorInterface, 

22) 

23 

24 

25@pytest.fixture 

26def default_accessor(generate_default_accessor): 

27 """ 

28 Set up mocks and an object to perform common operations. 

29 Needs to be function-scoped since we want to check mock calls for each test. 

30 """ 

31 tmp_path_session, python_module = generate_default_accessor 

32 

33 register_accessor = Mock(spec=PythonRegisterAccessorInterface) 

34 test_accessor = python_module.get_accessor(register_accessor=register_accessor) 

35 

36 class DefaultAccessor: 

37 def __init__(self): 

38 self.tmp_path_session = tmp_path_session 

39 self.python_module = python_module 

40 self.register_accessor = register_accessor 

41 self.test_accessor = test_accessor 

42 

43 def set_read_value(self, value: int): 

44 self.register_accessor.read_register.return_value = value 

45 

46 def assert_call( 

47 self, 

48 read_index: int | None = None, 

49 write_index: int | None = None, 

50 write_value: int | None = None, 

51 ): 

52 if read_index is None: 

53 self.register_accessor.read_register.assert_not_called() 

54 else: 

55 self.register_accessor.read_register.assert_called_once_with( 

56 register_list_name="test", register_address=4 * read_index 

57 ) 

58 

59 if write_index is None: 

60 self.register_accessor.write_register.assert_not_called() 

61 else: 

62 self.register_accessor.write_register.assert_called_once_with( 

63 register_list_name="test", 

64 register_address=4 * write_index, 

65 register_value=write_value, 

66 ) 

67 

68 return DefaultAccessor() 

69 

70 

71SAMPLE_U32_0 = 0b10101010101010101010101010101010 

72SAMPLE_U32_1 = 0b01010101010101010101010101010101 

73 

74 

75# ================================================================================================== 

76# Test values for the 'test_register' with the 'a' fields. 

77# ================================================================================================== 

78 

79 

80def get_a_value_int( 

81 bit_aa0=0b0, 

82 bit_aa1=0b1, 

83 unsigned_aa=0b0101, 

84 signed_aa=0b1010, 

85 ufixed_aa=0b0110, 

86 sfixed_aa=0b1001, 

87 enumeration_aa=0b01, 

88 uint_aa=0b0101, 

89 sint_aa=0b00010, 

90): 

91 """ 

92 Default argument values correspond to the default values in the register. 

93 """ 

94 return ( 

95 (bit_aa0 << 0) 

96 + (bit_aa1 << 1) 

97 + (unsigned_aa << 2) 

98 + (signed_aa << 6) 

99 + (ufixed_aa << 10) 

100 + (sfixed_aa << 14) 

101 + (enumeration_aa << 18) 

102 + (uint_aa << 20) 

103 + (sint_aa << 24) 

104 ) 

105 

106 

107def a_value0_int( 

108 bit_aa0=0b0, 

109 bit_aa1=0b1, 

110 unsigned_aa=0b0110, 

111 signed_aa=0b1001, 

112 ufixed_aa=0b1100, 

113 sfixed_aa=0b1101, 

114 enumeration_aa=0b10, 

115 uint_aa=0b1010, 

116 sint_aa=0b11011, 

117): 

118 return get_a_value_int( 

119 bit_aa0=bit_aa0, 

120 bit_aa1=bit_aa1, 

121 unsigned_aa=unsigned_aa, 

122 signed_aa=signed_aa, 

123 ufixed_aa=ufixed_aa, 

124 sfixed_aa=sfixed_aa, 

125 enumeration_aa=enumeration_aa, 

126 uint_aa=uint_aa, 

127 sint_aa=sint_aa, 

128 ) 

129 

130 

131def a_value0_class(value_class, uint_aa=10): 

132 return value_class( 

133 bit_aa0=0, 

134 bit_aa1=1, 

135 unsigned_aa=6, 

136 signed_aa=-7, 

137 ufixed_aa=3.0, 

138 sfixed_aa=-0.375, 

139 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA2, 

140 uint_aa=uint_aa, 

141 sint_aa=-5, 

142 ) 

143 

144 

145def a_value1_int( 

146 bit_aa0=0b1, 

147 bit_aa1=0b0, 

148 unsigned_aa=0b1111, 

149 signed_aa=0b1101, 

150 ufixed_aa=0b1011, 

151 sfixed_aa=0b1110, 

152 enumeration_aa=0b00, 

153 uint_aa=0b0101, 

154 sint_aa=0b00011, 

155): 

156 return get_a_value_int( 

157 bit_aa0=bit_aa0, 

158 bit_aa1=bit_aa1, 

159 unsigned_aa=unsigned_aa, 

160 signed_aa=signed_aa, 

161 ufixed_aa=ufixed_aa, 

162 sfixed_aa=sfixed_aa, 

163 enumeration_aa=enumeration_aa, 

164 uint_aa=uint_aa, 

165 sint_aa=sint_aa, 

166 ) 

167 

168 

169def a_value1_class(value_class): 

170 return value_class( 

171 bit_aa0=1, 

172 bit_aa1=0, 

173 unsigned_aa=15, 

174 signed_aa=-3, 

175 ufixed_aa=2.75, 

176 sfixed_aa=-0.25, 

177 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA0, 

178 uint_aa=5, 

179 sint_aa=3, 

180 ) 

181 

182 

183def a_value2_int( 

184 bit_aa0=0b0, 

185 bit_aa1=0b1, 

186 unsigned_aa=0b0010, 

187 signed_aa=0b1101, 

188 ufixed_aa=0b1100, 

189 sfixed_aa=0b1000, 

190 enumeration_aa=0b10, 

191 uint_aa=0b0111, 

192 sint_aa=0b01010, 

193): 

194 return get_a_value_int( 

195 bit_aa0=bit_aa0, 

196 bit_aa1=bit_aa1, 

197 unsigned_aa=unsigned_aa, 

198 signed_aa=signed_aa, 

199 ufixed_aa=ufixed_aa, 

200 sfixed_aa=sfixed_aa, 

201 enumeration_aa=enumeration_aa, 

202 uint_aa=uint_aa, 

203 sint_aa=sint_aa, 

204 ) 

205 

206 

207def a_value2_class(value_class): 

208 return value_class( 

209 bit_aa0=0, 

210 bit_aa1=1, 

211 unsigned_aa=2, 

212 signed_aa=-3, 

213 ufixed_aa=3.0, 

214 sfixed_aa=-1.0, 

215 enumeration_aa=value_class.EnumerationAa.ELEMENT_AA2, 

216 uint_aa=7, 

217 sint_aa=10, 

218 ) 

219 

220 

221# ================================================================================================== 

222 

223 

224# ================================================================================================== 

225# Read empty registers. 

226# Methods should take integer value. 

227# 

228# Variants: 

229# * Array registers, plain registers. 

230# * Mode: r, r_w, r_wpulse 

231# 

232# 6 tests in total. 

233# ================================================================================================== 

234 

235 

236def test_read_empty_r_register_plain(default_accessor): 

237 default_accessor.set_read_value(SAMPLE_U32_0) 

238 assert default_accessor.test_accessor.read_empty_r() == SAMPLE_U32_0 

239 

240 default_accessor.assert_call(read_index=5) 

241 

242 

243def test_read_empty_r_w_register_plain(default_accessor): 

244 default_accessor.set_read_value(SAMPLE_U32_1) 

245 assert default_accessor.test_accessor.read_empty_r_w() == SAMPLE_U32_1 

246 

247 default_accessor.assert_call(read_index=7) 

248 

249 

250def test_read_empty_r_wpulse_register_plain(default_accessor): 

251 default_accessor.set_read_value(SAMPLE_U32_0) 

252 assert default_accessor.test_accessor.read_empty_r_wpulse() == SAMPLE_U32_0 

253 

254 default_accessor.assert_call(read_index=9) 

255 

256 

257def test_read_empty_r_register_in_array(default_accessor): 

258 default_accessor.set_read_value(SAMPLE_U32_0) 

259 assert default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=2) == SAMPLE_U32_0 

260 

261 default_accessor.assert_call(read_index=15 + 2 * 15 + 5) 

262 

263 

264def test_read_empty_r_w_register_in_array(default_accessor): 

265 default_accessor.set_read_value(SAMPLE_U32_1) 

266 assert default_accessor.test_accessor.read_reg_array_a_empty_r_w(array_index=2) == SAMPLE_U32_1 

267 

268 default_accessor.assert_call(read_index=15 + 2 * 15 + 7) 

269 

270 

271def test_read_empty_r_wpulse_register_in_array(default_accessor): 

272 default_accessor.set_read_value(SAMPLE_U32_0) 

273 assert ( 

274 default_accessor.test_accessor.read_reg_array_a_empty_r_wpulse(array_index=2) 

275 == SAMPLE_U32_0 

276 ) 

277 

278 default_accessor.assert_call(read_index=15 + 2 * 15 + 9) 

279 

280 

281# ================================================================================================== 

282 

283 

284# ================================================================================================== 

285# Write empty registers. 

286# Methods should take integer argument values. 

287# 

288# Variants: 

289# * Array registers, plain registers. 

290# * Mode: w, r_w, wpulse, r_wpulse 

291# 

292# 8 tests in total. 

293# ================================================================================================== 

294 

295 

296def test_write_empty_w_register_plain(default_accessor): 

297 default_accessor.test_accessor.write_empty_w(register_value=SAMPLE_U32_1) 

298 

299 default_accessor.assert_call(write_index=6, write_value=SAMPLE_U32_1) 

300 

301 

302def test_write_empty_r_w_register_plain(default_accessor): 

303 default_accessor.test_accessor.write_empty_r_w(register_value=SAMPLE_U32_0) 

304 

305 default_accessor.assert_call(write_index=7, write_value=SAMPLE_U32_0) 

306 

307 

308def test_write_empty_wpulse_register_plain(default_accessor): 

309 default_accessor.test_accessor.write_empty_wpulse(register_value=SAMPLE_U32_1) 

310 

311 default_accessor.assert_call(write_index=8, write_value=SAMPLE_U32_1) 

312 

313 

314def test_write_empty_r_wpulse_register_plain(default_accessor): 

315 default_accessor.test_accessor.write_empty_r_wpulse(register_value=SAMPLE_U32_0) 

316 

317 default_accessor.assert_call(write_index=9, write_value=SAMPLE_U32_0) 

318 

319 

320def test_write_empty_w_register_in_array(default_accessor): 

321 default_accessor.test_accessor.write_reg_array_a_empty_w( 

322 register_value=SAMPLE_U32_1, array_index=2 

323 ) 

324 

325 default_accessor.assert_call(write_index=15 + 2 * 15 + 6, write_value=SAMPLE_U32_1) 

326 

327 

328def test_write_empty_r_w_register_in_array(default_accessor): 

329 default_accessor.test_accessor.write_reg_array_a_empty_r_w( 

330 register_value=SAMPLE_U32_0, array_index=2 

331 ) 

332 

333 default_accessor.assert_call(write_index=15 + 2 * 15 + 7, write_value=SAMPLE_U32_0) 

334 

335 

336def test_write_empty_wpulse_register_in_array(default_accessor): 

337 default_accessor.test_accessor.write_reg_array_a_empty_wpulse( 

338 register_value=SAMPLE_U32_1, array_index=2 

339 ) 

340 

341 default_accessor.assert_call(write_index=15 + 2 * 15 + 8, write_value=SAMPLE_U32_1) 

342 

343 

344def test_write_empty_r_wpulse_register_in_array(default_accessor): 

345 default_accessor.test_accessor.write_reg_array_a_empty_r_wpulse( 

346 register_value=SAMPLE_U32_0, array_index=2 

347 ) 

348 

349 default_accessor.assert_call(write_index=15 + 2 * 15 + 9, write_value=SAMPLE_U32_0) 

350 

351 

352# ================================================================================================== 

353 

354 

355# ================================================================================================== 

356# Read registers with value converted to value class. 

357# Methods should return class object. 

358# 

359# Variants: 

360# * Array registers, plain registers. 

361# * Mode: r, r_w, r_wpulse 

362# 

363# 6 tests in total. 

364# ================================================================================================== 

365 

366 

367def test_read_class_r_plain(default_accessor): 

368 default_accessor.set_read_value(a_value0_int()) 

369 assert default_accessor.test_accessor.read_reg_r() == a_value0_class( 

370 default_accessor.python_module.TestRegRValue 

371 ) 

372 

373 default_accessor.assert_call(read_index=0) 

374 

375 

376def test_read_class_r_w_plain(default_accessor): 

377 default_accessor.set_read_value(a_value1_int()) 

378 assert default_accessor.test_accessor.read_reg_r_w() == a_value1_class( 

379 default_accessor.python_module.TestRegRWValue 

380 ) 

381 

382 default_accessor.assert_call(read_index=2) 

383 

384 

385def test_read_class_r_wpulse_plain(default_accessor): 

386 default_accessor.set_read_value(a_value2_int()) 

387 assert default_accessor.test_accessor.read_reg_r_wpulse() == a_value2_class( 

388 default_accessor.python_module.TestRegRWpulseValue 

389 ) 

390 

391 default_accessor.assert_call(read_index=4) 

392 

393 

394def test_read_class_r_in_array(default_accessor): 

395 default_accessor.set_read_value(a_value2_int()) 

396 assert default_accessor.test_accessor.read_reg_array_a_reg_r(array_index=2) == a_value2_class( 

397 default_accessor.python_module.TestRegArrayARegRValue 

398 ) 

399 

400 default_accessor.assert_call(read_index=15 + 2 * 15 + 0) 

401 

402 

403def test_read_class_r_w_in_array(default_accessor): 

404 default_accessor.set_read_value(a_value1_int()) 

405 assert default_accessor.test_accessor.read_reg_array_a_reg_r_w(array_index=2) == a_value1_class( 

406 default_accessor.python_module.TestRegArrayARegRWValue 

407 ) 

408 

409 default_accessor.assert_call(read_index=15 + 2 * 15 + 2) 

410 

411 

412def test_read_class_r_wpulse_in_array(default_accessor): 

413 default_accessor.set_read_value(a_value0_int()) 

414 assert default_accessor.test_accessor.read_reg_array_a_reg_r_wpulse( 

415 array_index=1 

416 ) == a_value0_class(default_accessor.python_module.TestRegArrayARegRWpulseValue) 

417 

418 default_accessor.assert_call(read_index=15 + 1 * 15 + 4) 

419 

420 

421# ================================================================================================== 

422 

423 

424# ================================================================================================== 

425# Write registers with value class. 

426# Methods should take class objects. 

427# 

428# Variants: 

429# * Array registers, plain registers. 

430# * Mode: w, r_w, wpulse, r_wpulse 

431# 

432# 8 tests in total. 

433# ================================================================================================== 

434 

435 

436def test_write_class_w_plain(default_accessor): 

437 default_accessor.test_accessor.write_reg_w( 

438 register_value=a_value0_class(default_accessor.python_module.TestRegWValue), 

439 ) 

440 

441 default_accessor.assert_call(write_index=1, write_value=a_value0_int()) 

442 

443 

444def test_write_class_r_w_plain(default_accessor): 

445 default_accessor.test_accessor.write_reg_r_w( 

446 register_value=a_value1_class(default_accessor.python_module.TestRegRWValue), 

447 ) 

448 

449 default_accessor.assert_call(write_index=2, write_value=a_value1_int()) 

450 

451 

452def test_write_class_wpulse_plain(default_accessor): 

453 default_accessor.test_accessor.write_reg_wpulse( 

454 register_value=a_value2_class(default_accessor.python_module.TestRegWpulseValue), 

455 ) 

456 

457 default_accessor.assert_call(write_index=3, write_value=a_value2_int()) 

458 

459 

460def test_write_class_r_wpulse_plain(default_accessor): 

461 default_accessor.test_accessor.write_reg_r_wpulse( 

462 register_value=a_value0_class(default_accessor.python_module.TestRegRWpulseValue), 

463 ) 

464 

465 default_accessor.assert_call(write_index=4, write_value=a_value0_int()) 

466 

467 

468def test_write_class_w_in_array(default_accessor): 

469 default_accessor.test_accessor.write_reg_array_a_reg_w( 

470 register_value=a_value1_class(default_accessor.python_module.TestRegArrayARegWValue), 

471 array_index=2, 

472 ) 

473 

474 default_accessor.assert_call(write_index=15 + 2 * 15 + 1, write_value=a_value1_int()) 

475 

476 

477def test_write_class_r_w_in_array(default_accessor): 

478 default_accessor.test_accessor.write_reg_array_a_reg_r_w( 

479 register_value=a_value2_class(default_accessor.python_module.TestRegArrayARegRWValue), 

480 array_index=1, 

481 ) 

482 

483 default_accessor.assert_call(write_index=15 + 1 * 15 + 2, write_value=a_value2_int()) 

484 

485 

486def test_write_class_wpulse_in_array(default_accessor): 

487 default_accessor.test_accessor.write_reg_array_a_reg_wpulse( 

488 register_value=a_value0_class(default_accessor.python_module.TestRegArrayARegRWpulseValue), 

489 array_index=2, 

490 ) 

491 

492 default_accessor.assert_call(write_index=15 + 2 * 15 + 3, write_value=a_value0_int()) 

493 

494 

495def test_write_class_r_wpulse_in_array(default_accessor): 

496 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse( 

497 register_value=a_value1_class(default_accessor.python_module.TestRegArrayARegRWpulseValue), 

498 array_index=0, 

499 ) 

500 

501 default_accessor.assert_call(write_index=15 + 0 * 15 + 4, write_value=a_value1_int()) 

502 

503 

504# ================================================================================================== 

505 

506 

507# ================================================================================================== 

508# Write field to register that has only a single field. 

509# Methods should take native type. 

510# 

511# Variants: 

512# * Array registers, plain registers. 

513# * Mode: w, r_w, wpulse, r_wpulse 

514# * Type: bit, unsigned, signed, ufixed, sfixed, enumeration, uint, sint 

515# 

516# We test a subset of all possible combinations. Most important is to try the different types. 

517# ================================================================================================== 

518 

519 

520def test_write_field_w_plain_single_bit(default_accessor): 

521 default_accessor.test_accessor.write_single_w_bit_bit_bb(field_value=1) 

522 

523 default_accessor.assert_call(write_index=10, write_value=0b1) 

524 

525 

526def test_write_field_w_plain_single_unsigned(default_accessor): 

527 default_accessor.test_accessor.write_single_w_unsigned_unsigned_bb(field_value=15) 

528 

529 default_accessor.assert_call(write_index=11, write_value=0b1111) 

530 

531 

532def test_write_field_r_w_plain_single_sfixed(default_accessor): 

533 default_accessor.test_accessor.write_single_r_w_sfixed_sfixed_bb(field_value=-1.75) 

534 

535 default_accessor.assert_call(write_index=12, write_value=0b1001) 

536 

537 

538def test_write_field_wpulse_plain_single_enumeration(default_accessor): 

539 field_value = ( 

540 default_accessor.python_module.TestSingleWpulseEnumerationValue.EnumerationBb.ELEMENT_BB2 

541 ) 

542 default_accessor.test_accessor.write_single_wpulse_enumeration_enumeration_bb( 

543 field_value=field_value 

544 ) 

545 

546 default_accessor.assert_call(write_index=13, write_value=0b10) 

547 

548 

549def test_write_field_r_wpulse_plain_single_uint(default_accessor): 

550 default_accessor.test_accessor.write_single_r_wpulse_uint_uint_bb(field_value=11) 

551 

552 default_accessor.assert_call(write_index=14, write_value=0b1011) 

553 

554 

555def test_write_field_r_w_in_array_single_sfixed(default_accessor): 

556 default_accessor.test_accessor.write_reg_array_a_single_r_w_sfixed_sfixed_bb( 

557 field_value=1.5, array_index=2 

558 ) 

559 

560 default_accessor.assert_call(write_index=15 + 15 * 2 + 12, write_value=0b0110) 

561 

562 

563def test_write_field_wpulse_in_array_single_enumeration(default_accessor): 

564 register_value_class = default_accessor.python_module.TestRegArrayASingleWpulseEnumerationValue 

565 field_value = register_value_class.EnumerationBb.ELEMENT_BB1 

566 default_accessor.test_accessor.write_reg_array_a_single_wpulse_enumeration_enumeration_bb( 

567 field_value=field_value, array_index=1 

568 ) 

569 

570 default_accessor.assert_call(write_index=15 + 15 * 1 + 13, write_value=0b01) 

571 

572 

573# ================================================================================================== 

574 

575 

576# ================================================================================================== 

577# Write field to register that has multiple fields. 

578# Methods should take native type. 

579# 

580# Variants: 

581# * Array registers, plain registers. 

582# * Mode: w, r_w, wpulse, r_wpulse 

583# * Type: bit, unsigned, signed, ufixed, sfixed, enumeration, uint, sint 

584# 

585# Mode 'r_w' should do a read-modify-write. 

586# Mode 'w', 'wpulse' and 'r_wpulse' should do a write with all other fields set to default. 

587# 

588# We test a subset of all possible combinations. 

589# ================================================================================================== 

590 

591 

592def test_write_field_w_plain_multiple_bit_aa0(default_accessor): 

593 default_accessor.test_accessor.write_reg_w_bit_aa0(field_value=1) 

594 

595 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(bit_aa0=0b1)) 

596 

597 

598def test_write_field_w_plain_multiple_bit_aa1(default_accessor): 

599 default_accessor.test_accessor.write_reg_w_bit_aa1(field_value=0) 

600 

601 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(bit_aa1=0b0)) 

602 

603 

604def test_write_field_w_plain_multiple_unsigned_aa(default_accessor): 

605 default_accessor.test_accessor.write_reg_w_unsigned_aa(field_value=9) 

606 

607 default_accessor.assert_call(write_index=1, write_value=get_a_value_int(unsigned_aa=0b1001)) 

608 

609 

610def test_write_field_wpulse_plain_multiple_signed_aa(default_accessor): 

611 default_accessor.test_accessor.write_reg_wpulse_signed_aa(field_value=-3) 

612 

613 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(signed_aa=0b1101)) 

614 

615 

616def test_write_field_wpulse_plain_multiple_ufixed_aa(default_accessor): 

617 default_accessor.test_accessor.write_reg_wpulse_ufixed_aa(field_value=3.25) 

618 

619 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(ufixed_aa=0b1101)) 

620 

621 

622def test_write_field_wpulse_plain_multiple_sfixed_aa(default_accessor): 

623 default_accessor.test_accessor.write_reg_wpulse_sfixed_aa(field_value=-0.75) 

624 

625 default_accessor.assert_call(write_index=3, write_value=get_a_value_int(sfixed_aa=0b1010)) 

626 

627 

628def test_write_field_r_wpulse_in_array_multiple_enumeration_aa(default_accessor): 

629 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_enumeration_aa( 

630 field_value=default_accessor.python_module.TestRegRWpulseValue.EnumerationAa.ELEMENT_AA2, 

631 array_index=0, 

632 ) 

633 

634 default_accessor.assert_call( 

635 write_index=15 + 15 * 0 + 4, write_value=get_a_value_int(enumeration_aa=0b10) 

636 ) 

637 

638 

639def test_write_field_r_wpulse_in_array_multiple_uint_aa(default_accessor): 

640 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_uint_aa( 

641 field_value=10, array_index=1 

642 ) 

643 

644 default_accessor.assert_call( 

645 write_index=15 + 15 * 1 + 4, write_value=get_a_value_int(uint_aa=0b1010) 

646 ) 

647 

648 

649def test_write_field_r_wpulse_in_array_multiple_sint_aa(default_accessor): 

650 default_accessor.test_accessor.write_reg_array_a_reg_r_wpulse_sint_aa( 

651 field_value=-3, array_index=2 

652 ) 

653 

654 default_accessor.assert_call( 

655 write_index=15 + 15 * 2 + 4, write_value=get_a_value_int(sint_aa=0b11101) 

656 ) 

657 

658 

659def test_write_field_r_w_plain_multiple_bit_aa0(default_accessor): 

660 default_accessor.set_read_value(a_value0_int()) 

661 default_accessor.test_accessor.write_reg_r_w_bit_aa0(field_value=1) 

662 

663 default_accessor.assert_call(read_index=2, write_index=2, write_value=a_value0_int(bit_aa0=0b1)) 

664 

665 

666def test_write_field_r_w_plain_multiple_bit_aa1(default_accessor): 

667 default_accessor.set_read_value(a_value0_int()) 

668 default_accessor.test_accessor.write_reg_r_w_bit_aa1(field_value=0) 

669 

670 default_accessor.assert_call(read_index=2, write_index=2, write_value=a_value0_int(bit_aa1=0b0)) 

671 

672 

673def test_write_field_r_w_plain_multiple_unsigned_aa(default_accessor): 

674 default_accessor.set_read_value(a_value0_int()) 

675 default_accessor.test_accessor.write_reg_r_w_unsigned_aa(field_value=9) 

676 

677 default_accessor.assert_call( 

678 read_index=2, write_index=2, write_value=a_value0_int(unsigned_aa=0b1001) 

679 ) 

680 

681 

682def test_write_field_r_w_plain_multiple_signed_aa(default_accessor): 

683 default_accessor.set_read_value(a_value1_int()) 

684 default_accessor.test_accessor.write_reg_r_w_signed_aa(field_value=-3) 

685 

686 default_accessor.assert_call( 

687 read_index=2, write_index=2, write_value=a_value1_int(signed_aa=0b1101) 

688 ) 

689 

690 

691def test_write_field_r_w_plain_multiple_ufixed_aa(default_accessor): 

692 default_accessor.set_read_value(a_value1_int()) 

693 default_accessor.test_accessor.write_reg_r_w_ufixed_aa(field_value=3.25) 

694 

695 default_accessor.assert_call( 

696 read_index=2, write_index=2, write_value=a_value1_int(ufixed_aa=0b1101) 

697 ) 

698 

699 

700def test_write_field_r_w_plain_multiple_sfixed_aa(default_accessor): 

701 default_accessor.set_read_value(a_value1_int()) 

702 default_accessor.test_accessor.write_reg_r_w_sfixed_aa(field_value=-0.75) 

703 

704 default_accessor.assert_call( 

705 read_index=2, 

706 write_index=2, 

707 write_value=a_value1_int(sfixed_aa=0b1010), 

708 ) 

709 

710 

711def test_write_field_r_w_in_array_multiple_enumeration_aa(default_accessor): 

712 default_accessor.set_read_value(a_value2_int()) 

713 default_accessor.test_accessor.write_reg_array_a_reg_r_w_enumeration_aa( 

714 field_value=default_accessor.python_module.TestRegRWValue.EnumerationAa.ELEMENT_AA2, 

715 array_index=0, 

716 ) 

717 

718 default_accessor.assert_call( 

719 read_index=15 + 15 * 0 + 2, 

720 write_index=15 + 15 * 0 + 2, 

721 write_value=a_value2_int(enumeration_aa=0b10), 

722 ) 

723 

724 

725def test_write_field_r_w_in_array_multiple_uint_aa(default_accessor): 

726 default_accessor.set_read_value(a_value2_int()) 

727 default_accessor.test_accessor.write_reg_array_a_reg_r_w_uint_aa(field_value=10, array_index=1) 

728 

729 default_accessor.assert_call( 

730 read_index=15 + 15 * 1 + 2, 

731 write_index=15 + 15 * 1 + 2, 

732 write_value=a_value2_int(uint_aa=0b1010), 

733 ) 

734 

735 

736def test_write_field_r_w_in_array_multiple_sint_aa(default_accessor): 

737 default_accessor.set_read_value(a_value2_int()) 

738 default_accessor.test_accessor.write_reg_array_a_reg_r_w_sint_aa(field_value=-3, array_index=2) 

739 

740 default_accessor.assert_call( 

741 read_index=15 + 15 * 2 + 2, 

742 write_index=15 + 15 * 2 + 2, 

743 write_value=a_value2_int(sint_aa=0b11101), 

744 ) 

745 

746 

747# ================================================================================================== 

748 

749 

750# ================================================================================================== 

751# Basic tests 

752# ================================================================================================== 

753 

754 

755def test_read_with_array_index_out_of_bound_should_raise_exception(default_accessor): 

756 with pytest.raises(ValueError) as exception_info: 

757 default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=3) 

758 assert ( 

759 str(exception_info.value) 

760 == 'Index 3 out of range for register array "reg_array_a" of length 3.' 

761 ) 

762 

763 

764def test_read_with_array_index_negative_should_raise_exception(default_accessor): 

765 with pytest.raises(ValueError) as exception_info: 

766 default_accessor.test_accessor.read_reg_array_a_empty_r(array_index=-1) 

767 assert ( 

768 str(exception_info.value) 

769 == 'Index -1 out of range for register array "reg_array_a" of length 3.' 

770 ) 

771 

772 

773def test_read_integer_out_of_range_should_raise_exception(default_accessor): 

774 default_accessor.set_read_value(a_value0_int(uint_aa=0b1111)) 

775 

776 with pytest.raises(ValueError) as exception_info: 

777 default_accessor.test_accessor.read_reg_r_w() 

778 assert ( 

779 str(exception_info.value) 

780 == 'Register field value "15" not inside "uint_aa" field\'s legal range: (0, 10).' 

781 ) 

782 

783 

784def test_read_enumeration_out_of_range_should_raise_exception(default_accessor): 

785 default_accessor.set_read_value(a_value0_int(enumeration_aa=0b11)) 

786 

787 with pytest.raises(ValueError) as exception_info: 

788 default_accessor.test_accessor.read_reg_r_w() 

789 assert ( 

790 str(exception_info.value) 

791 == 'Enumeration "enumeration_aa", requested element value does not exist. Got: "3".' 

792 ) 

793 

794 

795def test_write_integer_out_of_range_should_raise_exception(default_accessor): 

796 with pytest.raises(ValueError) as exception_info: 

797 default_accessor.test_accessor.write_reg_r_w( 

798 a_value0_class(value_class=default_accessor.python_module.TestRegRWValue, uint_aa=15) 

799 ) 

800 assert ( 

801 str(exception_info.value) 

802 == 'Value "15" not inside "uint_aa" field\'s legal range: (0, 10).' 

803 ) 

804 

805 

806def test_write_enumeration_out_of_range_should_raise_exception(default_accessor): 

807 @dataclass 

808 class ValueClass: 

809 class EnumerationAa(Enum): 

810 ELEMENT_AA0 = 1 

811 ELEMENT_AA1 = 2 

812 ELEMENT_AA2 = 3 

813 

814 bit_aa0: int 

815 bit_aa1: int 

816 unsigned_aa: int 

817 signed_aa: int 

818 ufixed_aa: float 

819 sfixed_aa: float 

820 enumeration_aa: EnumerationAa 

821 uint_aa: int 

822 sint_aa: int 

823 

824 with pytest.raises(ValueError) as exception_info: 

825 default_accessor.test_accessor.write_reg_r_w(a_value0_class(value_class=ValueClass)) 

826 assert ( 

827 str(exception_info.value) 

828 == 'Enumeration "enumeration_aa", requested element name does not exist. Got: "3".' 

829 ) 

830 

831 

832def test_register_accessor_read_value_out_of_range_should_raise_exception(default_accessor): 

833 default_accessor.set_read_value(2**32) 

834 with pytest.raises(ValueError) as exception_info: 

835 default_accessor.test_accessor.read_reg_r_w() 

836 assert ( 

837 str(exception_info.value) 

838 == 'Register read value "4294967296" from accessor is out of range.' 

839 ) 

840 

841 default_accessor.set_read_value(-1) 

842 with pytest.raises(ValueError) as exception_info: 

843 default_accessor.test_accessor.read_reg_r_w() 

844 assert str(exception_info.value) == 'Register read value "-1" from accessor is out of range.' 

845 

846 

847def test_register_write_value_out_of_range_should_raise_exception(default_accessor): 

848 with pytest.raises(ValueError) as exception_info: 

849 default_accessor.test_accessor.write_empty_w(register_value=2**32) 

850 assert str(exception_info.value) == 'Register write value "4294967296" is out of range.' 

851 

852 with pytest.raises(ValueError) as exception_info: 

853 default_accessor.test_accessor.write_empty_w(register_value=-1) 

854 assert str(exception_info.value) == 'Register write value "-1" is out of range.' 

855 

856 

857# ================================================================================================== 

858 

859 

860# ================================================================================================== 

861# Test printing 

862# ================================================================================================== 

863 

864 

865def test_print_registers(default_accessor): 

866 default_accessor.set_read_value(a_value0_int()) 

867 

868 string_io = io.StringIO() 

869 with contextlib.redirect_stdout(string_io): 

870 default_accessor.test_accessor.print_registers() 

871 stdout = string_io.getvalue() 

872 

873 # To inspect: 

874 # print(stdout) 

875 # assert False 

876 

877 values = """\ 

878 bit_aa0: 0 

879 bit_aa1: 1 

880 unsigned_aa: 6 (hexadecimal 6, binary 0110) 

881 signed_aa: -7 (unsigned decimal 9, hexadecimal 9, binary 1001) 

882 ufixed_aa: 3.0 (unsigned decimal 12, hexadecimal C, binary 1100) 

883 sfixed_aa: -0.375 (unsigned decimal 13, hexadecimal D, binary 1101) 

884 enumeration_aa: ELEMENT_AA2 (2) 

885 uint_aa: 10 (hexadecimal A, binary 1010) 

886 sint_aa: -5 (unsigned decimal 27, hexadecimal 1B, binary 1_1011) 

887""" 

888 

889 assert ( 

890 f"""\ 

891Register 'reg_r' .............................................................. \ 

892(index 0, address 0): 

893{values} 

894""" 

895 in stdout 

896 ) 

897 

898 assert ( 

899 f""" 

900Register 'reg_array_a[2].reg_r_wpulse' ........................................ \ 

901(index 49, address 196): 

902{values} 

903""" 

904 in stdout 

905 ) 

906 assert ( 

907 """ 

908Register 'reg_array_a[2].reg_wpulse' .......................................... \ 

909(index 48, address 192): 

910 Not readable. 

911""" 

912 in stdout 

913 ) 

914 

915 

916def test_print_registers_value1(default_accessor): 

917 default_accessor.set_read_value(a_value1_int()) 

918 

919 string_io = io.StringIO() 

920 with contextlib.redirect_stdout(string_io): 

921 default_accessor.test_accessor.print_registers() 

922 stdout = string_io.getvalue() 

923 

924 values = """\ 

925 bit_aa0: 1 

926 bit_aa1: 0 

927 unsigned_aa: 15 (hexadecimal F, binary 1111) 

928 signed_aa: -3 (unsigned decimal 13, hexadecimal D, binary 1101) 

929 ufixed_aa: 2.75 (unsigned decimal 11, hexadecimal B, binary 1011) 

930 sfixed_aa: -0.25 (unsigned decimal 14, hexadecimal E, binary 1110) 

931 enumeration_aa: ELEMENT_AA0 (0) 

932 uint_aa: 5 (hexadecimal 5, binary 0101) 

933 sint_aa: 3 (unsigned decimal 3, hexadecimal 03, binary 0_0011) 

934""" 

935 

936 assert ( 

937 f"""\ 

938Register 'reg_r' .............................................................. \ 

939(index 0, address 0): 

940{values} 

941""" 

942 in stdout 

943 ) 

944 

945 

946def test_print_registers_value2(default_accessor): 

947 default_accessor.set_read_value(a_value2_int()) 

948 

949 string_io = io.StringIO() 

950 with contextlib.redirect_stdout(string_io): 

951 default_accessor.test_accessor.print_registers() 

952 stdout = string_io.getvalue() 

953 

954 values = """\ 

955 bit_aa0: 0 

956 bit_aa1: 1 

957 unsigned_aa: 2 (hexadecimal 2, binary 0010) 

958 signed_aa: -3 (unsigned decimal 13, hexadecimal D, binary 1101) 

959 ufixed_aa: 3.0 (unsigned decimal 12, hexadecimal C, binary 1100) 

960 sfixed_aa: -1.0 (unsigned decimal 8, hexadecimal 8, binary 1000) 

961 enumeration_aa: ELEMENT_AA2 (2) 

962 uint_aa: 7 (hexadecimal 7, binary 0111) 

963 sint_aa: 10 (unsigned decimal 10, hexadecimal 0A, binary 0_1010) 

964""" 

965 

966 assert ( 

967 f"""\ 

968Register 'reg_r' .............................................................. \ 

969(index 0, address 0): 

970{values} 

971""" 

972 in stdout 

973 ) 

974 

975 

976# ==================================================================================================