Coverage for hdl_registers/test/functional/simulation/test_generated_vhdl_package.py: 100%

21 statements  

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1# -------------------------------------------------------------------------------------------------- 

2# Copyright (c) Lukas Vik. All rights reserved. 

3# 

4# This file is part of the hdl_registers project, a HDL register generator fast enough to be run 

5# in real time. 

6# https://hdl-registers.com 

7# https://gitlab.com/tsfpga/hdl_registers 

8# -------------------------------------------------------------------------------------------------- 

9 

10from pathlib import Path 

11 

12from vunit import VUnit 

13 

14from tsfpga.module import get_hdl_modules 

15 

16from hdl_registers import HDL_REGISTERS_DOC 

17from hdl_registers.parser import from_toml 

18 

19THIS_FOLDER = Path(__file__).parent.resolve() 

20 

21 

22def test_running_simulation(tmp_path): 

23 """ 

24 Run the testbench .vhd file that is next to this file. Contains assertions on the 

25 VHDL package generated from the example TOML file. Shows that the file can be compiled and 

26 that (some of) the information is correct. 

27 """ 

28 register_list = from_toml( 

29 module_name="example", 

30 toml_file=HDL_REGISTERS_DOC / "sphinx" / "files" / "regs_example.toml", 

31 ) 

32 register_list.create_vhdl_package(output_path=tmp_path) 

33 

34 vunit_proj = VUnit.from_argv( 

35 argv=["--minimal", "--num-threads", "4", "--output-path", str(tmp_path)] 

36 ) 

37 

38 library = vunit_proj.add_library(library_name="example") 

39 library.add_source_file(THIS_FOLDER / "tb_generated_vhdl_package.vhd") 

40 library.add_source_file(tmp_path / "example_regs_pkg.vhd") 

41 

42 for module in get_hdl_modules(): 

43 vunit_library = vunit_proj.add_library(library_name=module.library_name) 

44 for hdl_file in module.get_simulation_files(include_tests=False): 

45 vunit_library.add_source_file(hdl_file.path) 

46 

47 try: 

48 vunit_proj.main() 

49 except SystemExit as exception: 

50 assert exception.code == 0